# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/allwinner,sun8i-v3s-usb-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Allwinner V3s USB PHY Device Tree Bindings

maintainers:
  - Chen-Yu Tsai <wens@csie.org>
  - Maxime Ripard <mripard@kernel.org>

properties:
  "#phy-cells":
    const: 1

  compatible:
    const: allwinner,sun8i-v3s-usb-phy

  reg:
    items:
      - description: PHY Control registers
      - description: PHY PMU0 registers

  reg-names:
    items:
      - const: phy_ctrl
      - const: pmu0

  clocks:
    maxItems: 1
    description: USB OTG PHY bus clock

  clock-names:
    const: usb0_phy

  resets:
    maxItems: 1
    description: USB OTG reset

  reset-names:
    const: usb0_reset

  usb0_id_det-gpios:
    maxItems: 1
    description: GPIO to the USB OTG ID pin

  usb0_vbus_det-gpios:
    maxItems: 1
    description: GPIO to the USB OTG VBUS detect pin

  usb0_vbus_power-supply:
    description: Power supply to detect the USB OTG VBUS

  usb0_vbus-supply:
    description: Regulator controlling USB OTG VBUS

required:
  - "#phy-cells"
  - compatible
  - clocks
  - clock-names
  - reg
  - reg-names
  - resets
  - reset-names

additionalProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/clock/sun8i-v3s-ccu.h>
    #include <dt-bindings/reset/sun8i-v3s-ccu.h>

    phy@1c19400 {
        #phy-cells = <1>;
        compatible = "allwinner,sun8i-v3s-usb-phy";
        reg = <0x01c19400 0x2c>,
              <0x01c1a800 0x4>;
        reg-names = "phy_ctrl",
                    "pmu0";
        clocks = <&ccu CLK_USB_PHY0>;
        clock-names = "usb0_phy";
        resets = <&ccu RST_USB_PHY0>;
        reset-names = "usb0_reset";
        usb0_id_det-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
    };