| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/sound/nvidia,tegra30-hda.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: NVIDIA Tegra HDA controller |
| |
| description: | |
| The High Definition Audio (HDA) block provides a serial interface to |
| audio codec. It supports multiple input and output streams. |
| |
| maintainers: |
| - Thierry Reding <treding@nvidia.com> |
| - Jon Hunter <jonathanh@nvidia.com> |
| |
| properties: |
| $nodename: |
| pattern: "^hda@[0-9a-f]*$" |
| |
| compatible: |
| oneOf: |
| - const: nvidia,tegra30-hda |
| - items: |
| - enum: |
| - nvidia,tegra194-hda |
| - nvidia,tegra186-hda |
| - nvidia,tegra210-hda |
| - nvidia,tegra124-hda |
| - const: nvidia,tegra30-hda |
| - items: |
| - const: nvidia,tegra132-hda |
| - const: nvidia,tegra124-hda |
| - const: nvidia,tegra30-hda |
| |
| reg: |
| maxItems: 1 |
| |
| interrupts: |
| description: The interrupt from the HDA controller |
| maxItems: 1 |
| |
| clocks: |
| maxItems: 3 |
| |
| clock-names: |
| items: |
| - const: hda |
| - const: hda2hdmi |
| - const: hda2codec_2x |
| |
| resets: |
| maxItems: 3 |
| |
| reset-names: |
| items: |
| - const: hda |
| - const: hda2hdmi |
| - const: hda2codec_2x |
| |
| power-domains: |
| maxItems: 1 |
| |
| interconnects: |
| maxItems: 2 |
| |
| interconnect-names: |
| items: |
| - const: dma-mem |
| - const: write |
| |
| iommus: |
| maxItems: 1 |
| |
| nvidia,model: |
| $ref: /schemas/types.yaml#/definitions/string |
| description: | |
| The user-visible name of this sound complex. If this property is |
| not specified then boards can use default name provided in hda driver. |
| |
| required: |
| - compatible |
| - reg |
| - interrupts |
| - clocks |
| - clock-names |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include<dt-bindings/clock/tegra124-car-common.h> |
| #include<dt-bindings/interrupt-controller/arm-gic.h> |
| |
| hda@70030000 { |
| compatible = "nvidia,tegra124-hda", "nvidia,tegra30-hda"; |
| reg = <0x70030000 0x10000>; |
| interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&tegra_car TEGRA124_CLK_HDA>, |
| <&tegra_car TEGRA124_CLK_HDA2HDMI>, |
| <&tegra_car TEGRA124_CLK_HDA2CODEC_2X>; |
| clock-names = "hda", "hda2hdmi", "hda2codec_2x"; |
| resets = <&tegra_car 125>, /* hda */ |
| <&tegra_car 128>, /* hda2hdmi */ |
| <&tegra_car 111>; /* hda2codec_2x */ |
| reset-names = "hda", "hda2hdmi", "hda2codec_2x"; |
| nvidia,model = "jetson-tk1-hda"; |
| }; |
| |
| ... |
