blob: 9312197316f008b4b1a6832366d4420384dfc640 [file] [log] [blame]
// SPDX-License-Identifier: GPL-2.0-only
* Copyright (C) 2012 Texas Instruments Incorporated -
#include "am33xx.dtsi"
#include "am335x-bone-common.dtsi"
#include "am335x-boneblack-common.dtsi"
#include "am335x-boneblack-hdmi.dtsi"
/ {
model = "TI AM335x BeagleBone Black";
compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
&cpu0_opp_table {
* All PG 2.0 silicon may not support 1GHz but some of the early
* BeagleBone Blacks have PG 2.0 silicon which is guaranteed
* to support 1GHz OPP so enable it for PG 2.0 on this board.
oppnitro-1000000000 {
opp-supported-hw = <0x06 0x0100>;
&gpio0 {
gpio-line-names =
"P9_22 [spi0_sclk]",
"P9_21 [spi0_d0]",
"P9_18 [spi0_d1]",
"P9_17 [spi0_cs0]",
"P8_42A [ecappwm0]",
"P8_35 [lcd d12]",
"P8_33 [lcd d13]",
"P8_31 [lcd d14]",
"P8_32 [lcd d15]",
"P9_20 [i2c2_sda]",
"P9_19 [i2c2_scl]",
"P9_26 [uart1_rxd]",
"P9_24 [uart1_txd]",
"[hdmi cec]",
"P8_19 [ehrpwm2a]",
"P8_13 [ehrpwm2b]",
"P9_11 [uart4_rxd]",
"P9_13 [uart4_txd]";
&gpio1 {
gpio-line-names =
"P8_25 [mmc1_dat0]",
"P8_5 [mmc1_dat2]",
"P8_6 [mmc1_dat3]",
"P8_23 [mmc1_dat4]",
"P8_22 [mmc1_dat5]",
"P8_3 [mmc1_dat6]",
"P8_4 [mmc1_dat7]",
"P9_14 [ehrpwm1a]",
"P9_16 [ehrpwm1b]",
"[emmc rst]",
"[usr0 led]",
"[usr1 led]",
"[usr2 led]",
"[usr3 led]",
"[hdmi irq]",
"[usb vbus oc]",
"[hdmi audio]",
"P8_21 [emmc]",
"P8_20 [emmc]";
&gpio2 {
gpio-line-names =
"P8_45 [hdmi]",
"P8_46 [hdmi]",
"P8_43 [hdmi]",
"P8_44 [hdmi]",
"P8_41 [hdmi]",
"P8_42 [hdmi]",
"P8_39 [hdmi]",
"P8_40 [hdmi]",
"P8_37 [hdmi]",
"P8_38 [hdmi]",
"P8_36 [hdmi]",
"P8_34 [hdmi]",
"P8_27 [hdmi]",
"P8_29 [hdmi]",
"P8_28 [hdmi]",
"P8_30 [hdmi]",
&gpio3 {
gpio-line-names =
"[mii col]",
"[mii crs]",
"[mii rx err]",
"[mii tx en]",
"[mii rx dv]",
"[i2c0 sda]",
"[i2c0 scl]",
"[jtag emu0]",
"[jtag emu1]",
"[mii tx clk]",
"[mii rx clk]",
"[usb vbus en]",
"P9_31 [spi1_sclk]",
"P9_29 [spi1_d0]",
"P9_30 [spi1_d1]",
"P9_28 [spi1_cs0]",
"P9_42B [ecappwm0]",