tree da64e14dd8432602634773b52073928c50dfb85c
parent 4e6b26d23dc1faee318796d5c7f91b5692b1e6be
parent 28528fca4908142bd1a3247956cba56c9c667d71
author Thomas Gleixner <tglx@linutronix.de> 1550915611 +0100
committer Thomas Gleixner <tglx@linutronix.de> 1550915611 +0100
mergetag object 28528fca4908142bd1a3247956cba56c9c667d71
 type commit
 tag irqchip-5.1
 tagger Marc Zyngier <marc.zyngier@arm.com> 1550850772 +0000
 
 irqchip updates for Linux 5.1
 
 - Core pseudo-NMI handling code
 - Allow the default irq domain to be retrieved
 - A new interrupt controller for the Loongson LS1X platform
 - Affinity support for the SiFive PLIC
 - Better support for the iMX irqsteer driver
 - NUMA aware memory allocations for GICv3
 - A handful of other fixes (i8259, GICv3, PLIC)
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Merge tag 'irqchip-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core

Pull irqchip updates from Marc Zyngier

- Core pseudo-NMI handling code
- Allow the default irq domain to be retrieved
- A new interrupt controller for the Loongson LS1X platform
- Affinity support for the SiFive PLIC
- Better support for the iMX irqsteer driver
- NUMA aware memory allocations for GICv3
- A handful of other fixes (i8259, GICv3, PLIC)