ARM: OMAP2+: nand: header cleanup
For common arm zImage existing nand header file
in platform specific location was moved to generic
platform data location, but it contained more than
platform data, remove it. New local header has been
created for exposing functions.
Also move gpmc-nand platform data to platform header
meant for nand from gpmc header file
Signed-off-by: Afzal Mohammed <afzal@ti.com>
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 376d26e..fef68de 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -53,6 +53,7 @@
#include "sdram-micron-mt46h32m32lf-6.h"
#include "hsmmc.h"
#include "common-board-devices.h"
+#include "gpmc-nand.h"
#define CM_T35_GPIO_PENDOWN 57
#define SB_T35_USB_HUB_RESET_GPIO 167
@@ -181,7 +182,7 @@
static void __init cm_t35_init_nand(void)
{
- if (gpmc_nand_init(&cm_t35_nand_data) < 0)
+ if (gpmc_nand_init(&cm_t35_nand_data, NULL) < 0)
pr_err("CM-T35: Unable to register NAND device\n");
}
#else
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 59c0a45..3a19e80 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -49,6 +49,7 @@
#include "control.h"
#include "common-board-devices.h"
#include "am35xx-emac.h"
+#include "gpmc-nand.h"
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
static struct gpio_led cm_t3517_leds[] = {
@@ -240,7 +241,7 @@
static void __init cm_t3517_init_nand(void)
{
- if (gpmc_nand_init(&cm_t3517_nand_data) < 0)
+ if (gpmc_nand_init(&cm_t3517_nand_data, NULL) < 0)
pr_err("CM-T3517: NAND initialization failed\n");
}
#else
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index f438d51..ba9fa86 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -26,6 +26,7 @@
#include "common.h"
#include "board-flash.h"
#include "gpmc-onenand.h"
+#include "gpmc-nand.h"
#define REG_FPGA_REV 0x10
#define REG_FPGA_DIP_SWITCH_INPUT2 0x60
@@ -139,10 +140,9 @@
board_nand_data.parts = nand_parts;
board_nand_data.nr_parts = nr_parts;
board_nand_data.devsize = nand_type;
- board_nand_data.gpmc_t = gpmc_t;
board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT;
- gpmc_nand_init(&board_nand_data);
+ gpmc_nand_init(&board_nand_data, gpmc_t);
}
#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 00a1f4a..f286b4b 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -50,6 +50,7 @@
#include "sdram-micron-mt46h32m32lf-6.h"
#include "hsmmc.h"
#include "common-board-devices.h"
+#include "gpmc-nand.h"
#define PANDORA_WIFI_IRQ_GPIO 21
#define PANDORA_WIFI_NRESET_GPIO 23
@@ -602,7 +603,7 @@
omap_ads7846_init(1, OMAP3_PANDORA_TS_GPIO, 0, NULL);
usbhs_init(&usbhs_bdata);
usb_musb_init(NULL);
- gpmc_nand_init(&pandora_nand_data);
+ gpmc_nand_init(&pandora_nand_data, NULL);
/* Ensure SDRC pins are mux'd for self-refresh */
omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c
index 90e0597..ad85609 100644
--- a/arch/arm/mach-omap2/common-board-devices.c
+++ b/arch/arm/mach-omap2/common-board-devices.c
@@ -25,7 +25,6 @@
#include <linux/spi/ads7846.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
-#include <linux/platform_data/mtd-nand-omap2.h>
#include "common.h"
#include "common-board-devices.h"
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index 4acf497..abdb78a 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -20,6 +20,10 @@
#include <plat/gpmc.h>
#include "soc.h"
+#include "gpmc-nand.h"
+
+/* minimum size for IO mapping */
+#define NAND_IO_SIZE 4
static struct resource gpmc_nand_resource[] = {
{
@@ -40,41 +44,36 @@
.resource = gpmc_nand_resource,
};
-static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data)
+static int omap2_nand_gpmc_retime(
+ struct omap_nand_platform_data *gpmc_nand_data,
+ struct gpmc_timings *gpmc_t)
{
struct gpmc_timings t;
int err;
- if (!gpmc_nand_data->gpmc_t)
- return 0;
-
memset(&t, 0, sizeof(t));
- t.sync_clk = gpmc_nand_data->gpmc_t->sync_clk;
- t.cs_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_on);
- t.adv_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->adv_on);
+ t.sync_clk = gpmc_t->sync_clk;
+ t.cs_on = gpmc_round_ns_to_ticks(gpmc_t->cs_on);
+ t.adv_on = gpmc_round_ns_to_ticks(gpmc_t->adv_on);
/* Read */
- t.adv_rd_off = gpmc_round_ns_to_ticks(
- gpmc_nand_data->gpmc_t->adv_rd_off);
+ t.adv_rd_off = gpmc_round_ns_to_ticks(gpmc_t->adv_rd_off);
t.oe_on = t.adv_on;
- t.access = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->access);
- t.oe_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->oe_off);
- t.cs_rd_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_rd_off);
- t.rd_cycle = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->rd_cycle);
+ t.access = gpmc_round_ns_to_ticks(gpmc_t->access);
+ t.oe_off = gpmc_round_ns_to_ticks(gpmc_t->oe_off);
+ t.cs_rd_off = gpmc_round_ns_to_ticks(gpmc_t->cs_rd_off);
+ t.rd_cycle = gpmc_round_ns_to_ticks(gpmc_t->rd_cycle);
/* Write */
- t.adv_wr_off = gpmc_round_ns_to_ticks(
- gpmc_nand_data->gpmc_t->adv_wr_off);
+ t.adv_wr_off = gpmc_round_ns_to_ticks(gpmc_t->adv_wr_off);
t.we_on = t.oe_on;
if (cpu_is_omap34xx()) {
- t.wr_data_mux_bus = gpmc_round_ns_to_ticks(
- gpmc_nand_data->gpmc_t->wr_data_mux_bus);
- t.wr_access = gpmc_round_ns_to_ticks(
- gpmc_nand_data->gpmc_t->wr_access);
+ t.wr_data_mux_bus = gpmc_round_ns_to_ticks(gpmc_t->wr_data_mux_bus);
+ t.wr_access = gpmc_round_ns_to_ticks(gpmc_t->wr_access);
}
- t.we_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->we_off);
- t.cs_wr_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_wr_off);
- t.wr_cycle = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->wr_cycle);
+ t.we_off = gpmc_round_ns_to_ticks(gpmc_t->we_off);
+ t.cs_wr_off = gpmc_round_ns_to_ticks(gpmc_t->cs_wr_off);
+ t.wr_cycle = gpmc_round_ns_to_ticks(gpmc_t->wr_cycle);
/* Configure GPMC */
if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16)
@@ -91,7 +90,8 @@
return 0;
}
-int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
+int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
+ struct gpmc_timings *gpmc_t)
{
int err = 0;
struct device *dev = &gpmc_nand_device.dev;
@@ -112,11 +112,13 @@
gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE);
gpmc_nand_resource[2].start =
gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT);
- /* Set timings in GPMC */
- err = omap2_nand_gpmc_retime(gpmc_nand_data);
- if (err < 0) {
- dev_err(dev, "Unable to set gpmc timings: %d\n", err);
- return err;
+
+ if (gpmc_t) {
+ err = omap2_nand_gpmc_retime(gpmc_nand_data, gpmc_t);
+ if (err < 0) {
+ dev_err(dev, "Unable to set gpmc timings: %d\n", err);
+ return err;
+ }
}
/* Enable RD PIN Monitoring Reg */
diff --git a/arch/arm/mach-omap2/gpmc-nand.h b/arch/arm/mach-omap2/gpmc-nand.h
new file mode 100644
index 0000000..11a377f
--- /dev/null
+++ b/arch/arm/mach-omap2/gpmc-nand.h
@@ -0,0 +1,27 @@
+/*
+ * arch/arm/mach-omap2/gpmc-nand.h
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __OMAP2_GPMC_NAND_H
+#define __OMAP2_GPMC_NAND_H
+
+#include <plat/gpmc.h>
+#include <linux/platform_data/mtd-nand-omap2.h>
+
+#if IS_ENABLED(CONFIG_MTD_NAND_OMAP2)
+extern int gpmc_nand_init(struct omap_nand_platform_data *d,
+ struct gpmc_timings *gpmc_t);
+#else
+static inline int gpmc_nand_init(struct omap_nand_platform_data *d,
+ struct gpmc_timings *gpmc_t)
+{
+ return 0;
+}
+#endif
+
+#endif
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 91af5ae..34823b3 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -26,6 +26,8 @@
#include <linux/interrupt.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/mtd-nand-omap2.h>
+
#include <asm/mach-types.h>
#include <plat/gpmc.h>
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/plat-omap/include/plat/gpmc.h
index f7e0990..4b06bb4 100644
--- a/arch/arm/plat-omap/include/plat/gpmc.h
+++ b/arch/arm/plat-omap/include/plat/gpmc.h
@@ -11,6 +11,8 @@
#ifndef __OMAP2_GPMC_H
#define __OMAP2_GPMC_H
+#include <linux/platform_data/mtd-nand-omap2.h>
+
/* Maximum Number of Chip Selects */
#define GPMC_CS_NUM 8
@@ -86,16 +88,6 @@
#define PREFETCH_FIFOTHRESHOLD_MAX 0x40
#define PREFETCH_FIFOTHRESHOLD(val) ((val) << 8)
-enum omap_ecc {
- /* 1-bit ecc: stored at end of spare area */
- OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */
- OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
- /* 1-bit ecc: stored at beginning of spare area as romcode */
- OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */
- OMAP_ECC_BCH4_CODE_HW, /* 4-bit BCH ecc code */
- OMAP_ECC_BCH8_CODE_HW, /* 8-bit BCH ecc code */
-};
-
/*
* Note that all values in this struct are in nanoseconds except sync_clk
* (which is in picoseconds), while the register values are in gpmc_fck cycles.
@@ -133,22 +125,6 @@
u16 wr_data_mux_bus; /* WRDATAONADMUXBUS */
};
-struct gpmc_nand_regs {
- void __iomem *gpmc_status;
- void __iomem *gpmc_nand_command;
- void __iomem *gpmc_nand_address;
- void __iomem *gpmc_nand_data;
- void __iomem *gpmc_prefetch_config1;
- void __iomem *gpmc_prefetch_config2;
- void __iomem *gpmc_prefetch_control;
- void __iomem *gpmc_prefetch_status;
- void __iomem *gpmc_ecc_config;
- void __iomem *gpmc_ecc_control;
- void __iomem *gpmc_ecc_size_config;
- void __iomem *gpmc_ecc1_result;
- void __iomem *gpmc_bch_result0;
-};
-
extern void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs);
extern int gpmc_get_client_irq(unsigned irq_config);
diff --git a/include/linux/platform_data/mtd-nand-omap2.h b/include/linux/platform_data/mtd-nand-omap2.h
index 1a68c1e..e1965fe 100644
--- a/include/linux/platform_data/mtd-nand-omap2.h
+++ b/include/linux/platform_data/mtd-nand-omap2.h
@@ -8,7 +8,9 @@
* published by the Free Software Foundation.
*/
-#include <plat/gpmc.h>
+#ifndef _MTD_NAND_OMAP2_H
+#define _MTD_NAND_OMAP2_H
+
#include <linux/mtd/partitions.h>
enum nand_io {
@@ -18,10 +20,35 @@
NAND_OMAP_PREFETCH_IRQ /* prefetch enabled irq mode */
};
+enum omap_ecc {
+ /* 1-bit ecc: stored at end of spare area */
+ OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */
+ OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
+ /* 1-bit ecc: stored at beginning of spare area as romcode */
+ OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */
+ OMAP_ECC_BCH4_CODE_HW, /* 4-bit BCH ecc code */
+ OMAP_ECC_BCH8_CODE_HW, /* 8-bit BCH ecc code */
+};
+
+struct gpmc_nand_regs {
+ void __iomem *gpmc_status;
+ void __iomem *gpmc_nand_command;
+ void __iomem *gpmc_nand_address;
+ void __iomem *gpmc_nand_data;
+ void __iomem *gpmc_prefetch_config1;
+ void __iomem *gpmc_prefetch_config2;
+ void __iomem *gpmc_prefetch_control;
+ void __iomem *gpmc_prefetch_status;
+ void __iomem *gpmc_ecc_config;
+ void __iomem *gpmc_ecc_control;
+ void __iomem *gpmc_ecc_size_config;
+ void __iomem *gpmc_ecc1_result;
+ void __iomem *gpmc_bch_result0;
+};
+
struct omap_nand_platform_data {
int cs;
struct mtd_partition *parts;
- struct gpmc_timings *gpmc_t;
int nr_parts;
bool dev_ready;
enum nand_io xfer_type;
@@ -30,14 +57,4 @@
struct gpmc_nand_regs reg;
};
-/* minimum size for IO mapping */
-#define NAND_IO_SIZE 4
-
-#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
-extern int gpmc_nand_init(struct omap_nand_platform_data *d);
-#else
-static inline int gpmc_nand_init(struct omap_nand_platform_data *d)
-{
- return 0;
-}
#endif
