| commit | c7c6b39050aed4af913c17970ebfb592bae757fc | [log] [tgz] |
|---|---|---|
| author | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | Tue Nov 27 19:31:33 2007 +0100 |
| committer | Ralf Baechle <ralf@linux-mips.org> | Tue Jan 29 10:14:58 2008 +0000 |
| tree | faaad45cd4b3ef2f582c6b47a5082e9eee2853fd | |
| parent | 930bff882296c02ca81db108672ef4ca06c37db5 [diff] |
[MIPS] Use correct dma flushing in dma_cache_sync() Not cache coherent R10k systems (like IP28) need to do real cache invalidates in dma_cache_sync(). Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>