commit cad6fade6e78030e60188da3f18090577daa9243
author Max Filippov <jcmvbkbc@gmail.com> Tue Nov 27 16:27:47 2018 -0800
committer Max Filippov <jcmvbkbc@gmail.com> Tue Dec 04 14:08:11 2018 -0800
tree 4e2a429c4ba70161706227a3b195832201617ffd
parent c066cc8af9de8f749d29f75ad8c1c37d565f32b7

xtensa: clean up WSR*/RSR*/get_sr/set_sr

WSR and RSR are too generic and collide with other macro definitions in
the kernel causing warnings in allmodconfig builds. Drop WSR and RSR
macros and WSR_* and RSR_* variants. Change get_sr and set_sr to
xtensa_get_sr and xtensa_set_sr. Fix up users.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>

drivers/irqchip/irq-xtensa-pic.c

diff --git a/drivers/irqchip/irq-xtensa-pic.c b/drivers/irqchip/irq-xtensa-pic.c
index 000cb54..c200234 100644
--- a/drivers/irqchip/irq-xtensa-pic.c
+++ b/drivers/irqchip/irq-xtensa-pic.c
@@ -44,13 +44,13 @@ static const struct irq_domain_ops xtensa_irq_domain_ops = {
 static void xtensa_irq_mask(struct irq_data *d)
 {
 	cached_irq_mask &= ~(1 << d->hwirq);
-	set_sr(cached_irq_mask, intenable);
+	xtensa_set_sr(cached_irq_mask, intenable);
 }
 
 static void xtensa_irq_unmask(struct irq_data *d)
 {
 	cached_irq_mask |= 1 << d->hwirq;
-	set_sr(cached_irq_mask, intenable);
+	xtensa_set_sr(cached_irq_mask, intenable);
 }
 
 static void xtensa_irq_enable(struct irq_data *d)
@@ -65,12 +65,12 @@ static void xtensa_irq_disable(struct irq_data *d)
 
 static void xtensa_irq_ack(struct irq_data *d)
 {
-	set_sr(1 << d->hwirq, intclear);
+	xtensa_set_sr(1 << d->hwirq, intclear);
 }
 
 static int xtensa_irq_retrigger(struct irq_data *d)
 {
-	set_sr(1 << d->hwirq, intset);
+	xtensa_set_sr(1 << d->hwirq, intset);
 	return 1;
 }