| /* SPDX-License-Identifier: GPL-2.0 */ |
| /* |
| * Interconnect framework driver for i.MX SoC |
| * |
| * Copyright (c) 2019-2020, NXP |
| */ |
| |
| #ifndef __DT_BINDINGS_INTERCONNECT_IMX8MN_H |
| #define __DT_BINDINGS_INTERCONNECT_IMX8MN_H |
| |
| #define IMX8MN_ICN_NOC 1 |
| #define IMX8MN_ICS_DRAM 2 |
| #define IMX8MN_ICS_OCRAM 3 |
| #define IMX8MN_ICM_A53 4 |
| |
| #define IMX8MN_ICM_GPU 5 |
| #define IMX8MN_ICN_GPU 6 |
| |
| #define IMX8MN_ICM_CSI1 7 |
| #define IMX8MN_ICM_CSI2 8 |
| #define IMX8MN_ICM_ISI 9 |
| #define IMX8MN_ICM_LCDIF 10 |
| #define IMX8MN_ICN_MIPI 11 |
| |
| #define IMX8MN_ICM_USB 12 |
| |
| #define IMX8MN_ICM_SDMA2 13 |
| #define IMX8MN_ICM_SDMA3 14 |
| #define IMX8MN_ICN_AUDIO 15 |
| |
| #define IMX8MN_ICN_ENET 16 |
| #define IMX8MN_ICM_ENET 17 |
| |
| #define IMX8MN_ICM_NAND 18 |
| #define IMX8MN_ICM_SDMA1 19 |
| #define IMX8MN_ICM_USDHC1 20 |
| #define IMX8MN_ICM_USDHC2 21 |
| #define IMX8MN_ICM_USDHC3 22 |
| #define IMX8MN_ICN_MAIN 23 |
| |
| #endif /* __DT_BINDINGS_INTERCONNECT_IMX8MN_H */ |
