tree a417a55071b4b7edc22b7c5bb1a2352e7b5986d9
parent 860e546c19d88c21819c7f0861c505debd2d6eed
author Atsushi Nemoto <anemo@mba.ocn.ne.jp> 1219154109 +0900
committer Ralf Baechle <ralf@linux-mips.org> 1223738322 +0100

MIPS: TXx9: Cache fixup

TX39/TX49 can enable/disable I/D cache at runtime.  Add kernel options
to control them.  This is useful to debug some cache-related issues,
such as aliasing or I/D coherency.  Also enable CWF bit for TX49 SoCs.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>