commit | d506a65d56fd5287cf9219de7f3af5004b38fc6f | [log] [tgz] |
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author | Matt Roper <matthew.d.roper@intel.com> | Tue Oct 08 14:17:16 2019 -0700 |
committer | Matt Roper <matthew.d.roper@intel.com> | Thu Oct 24 16:48:17 2019 -0700 |
tree | c33b6f64f38e9378a5ad42549187aeeec23a91e9 | |
parent | 772d1dea1f6cbff55963e04f52341b3cc5e710c9 [diff] |
drm/i915: Catch GTT fault errors for gen11+ planes Gen11+ has more hardware planes than gen9 so we need to test additional pipe interrupt register bits to recognize any GTT faults that happen on these extra planes. Bspec: 50335 Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191008211716.8391-1-matthew.d.roper@intel.com