MIPS: Netlogic: select MIPSR2 for XLP
This allows us to use the r2 optimized code from kernel headers
while compilation.
Disable PGD_C0_CONTEXT option for XLP, which does not work.
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4456
Signed-off-by: John Crispin <blogic@openwrt.org>
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index a4919b0..83980a0 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1542,6 +1542,7 @@
select WEAK_ORDERING
select WEAK_REORDERING_BEYOND_LLSC
select CPU_HAS_PREFETCH
+ select CPU_MIPSR2
help
Netlogic Microsystems XLP processors.
endchoice
@@ -1755,7 +1756,7 @@
bool
config MIPS_PGD_C0_CONTEXT
bool
- default y if 64BIT && CPU_MIPSR2
+ default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
#
# Set to y for ptrace access to watch registers.
