| commit | d839e821efc06031c927cabbbc1e976bc71f5d4f | [log] [tgz] |
|---|---|---|
| author | Vladimir Zapolskiy <vz@mleia.com> | Mon Apr 25 04:00:23 2016 +0300 |
| committer | Vladimir Zapolskiy <vz@mleia.com> | Thu Apr 28 00:36:24 2016 +0300 |
| tree | 47547e13d0ebe3f89d728047db65fb197a5d19e9 | |
| parent | 961212e3fd1ee29d31f3c362f0bc854868679f63 [diff] |
dt-bindings: interrupt-controllers: add description of SIC1 and SIC2 NXP LPC32xx has three interrupt controllers, namely root Main Interrupt Controller (MIC) and two supplementary Sub Interrupt Controllers (SIC1 and SIC2), four interrupt outputs from SIC1 and SIC2 are connected to MIC. Acked-by: Rob Herring <robh@kernel.org> Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>