| commit | dc34b05fea0cc9a869863b929f37f1e8ce30edf4 | [log] [tgz] |
|---|---|---|
| author | Douglas Leung <douglas@mips.com> | Thu Jul 19 09:11:13 2012 +0200 |
| committer | Ralf Baechle <ralf@linux-mips.org> | Thu Jul 19 11:23:43 2012 +0200 |
| tree | ad064e7dcf5235d8c51060ed0c8db167c5490bd3 | |
| parent | c022630633624a75b3b58f43dd3c6cc896a56cff [diff] |
MIPS: Fix decoding of c0_config1 for MIPSxx caches with 32 ways per set. This affects certain 4Kc cores. Signed-off-by: Douglas Leung <douglas@mips.com> Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3855/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>