tree 11b826a2a9a474249fc13abe351fc05889fb1072
parent 81ee6833bc6ccd0c64d2f527775a3ded7aa9bfb4
author Marek Belisko <marek.belisko@gmail.com> 1367559456 +0200
committer Mark Brown <broonie@opensource.wolfsonmicro.com> 1367569799 +0100

ASoC: McASP: Fix receive clock polarity in DAIFMT_NB_NF mode.

According documentation bit ACLKRPOL is set to 0 (receiver samples data
on falling edge) and when set to 1 (receiver samples data on rising edge).

I2S data are always sampled on falling edge and valid during rising edge
of bit clock. So in case of capture data transmitter sample data on falling
edge and macsp must read then on rising edge.

Signed-off-by: Marek Belisko <marek.belisko@streamunlimited.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>