tree 0fca1f6a3507278776b1a02838205067d2fdb52b
parent 1cc21f7b6b747220c29b42cfd1c84b5648d12407
author Len Brown <len.brown@intel.com> 1426278657 -0400
committer Len Brown <len.brown@intel.com> 1428954774 -0400

tools/power turbostat: update PERF_LIMIT_REASONS decoding

cosmetic only.

order the decoding of MSR_PERF_LIMIT_REASONS bits
from MSB to LSB -- which you notice when more than 1 bit is set
and you are, say, comparing the output to the documentation...

Signed-off-by: Len Brown <len.brown@intel.com>