tree 0849bf328a69b36aa2f2d7c209ae89ad27a49ac2
parent 9a1af1e218779724ff29ca75f2b9397dc3ed11e7
author Richard Fitzgerald <rf@opensource.cirrus.com> 1722866919 +0100
committer Mark Brown <broonie@kernel.org> 1722878789 +0100
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmaxC0UACgkQJNaLcl1U
 h9BcyAf/WNxJpOt0JrWZ3qEWp/WqrAi5eIZNxLDIo0NzL1PYeXhJMXr8Lyaa+bIL
 yhMHMxT1MLIcZYRb0JDGKNFhPKkpjEP5fx3maZQ2r20KC8ZwVlSoh1GlJxV6yfQb
 QAKj+wZ78w4RMFDuCsfg97esHE6SrLpg3DVxINE0vPHxM3v6j4UYSw3SYrYrHYIT
 85covSr7kuko1zHahKjMr9K7KGAeNZNo92YOGedL9LX2ugASVnhkVv6JmL3gQswk
 JFSdbK36V7ii8tmNduPV4WiibklauCPPqxnPj8mC71DDuv915GhF6/se7bnlu8Z8
 rPfUg9KIYu1hP7wYehVCHolV5tahdg==
 =uOJL
 -----END PGP SIGNATURE-----

ASoC: cs35l56: Handle OTP read latency over SoundWire

Use the late-read buffer in the CS35L56 SoundWire interface to
read OTP memory.

The OTP memory has a longer access latency than chip registers
and cannot guarantee to return the data value in the SoundWire
control response if the bus clock is >4.8 MHz. The Cirrus
SoundWire peripheral IP exposes the bridge-to-bus read buffer
and status bits. For a read from OTP the bridge status bits are
polled to wait for the OTP data to be loaded into the read buffer
and the data is then read from there.

Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Fixes: e1830f66f6c6 ("ASoC: cs35l56: Add helper functions for amp calibration")
Link: https://patch.msgid.link/20240805140839.26042-1-rf@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>