commit e71d1a92550a44e0dc29c2fb4c254e4959183719
author Chanh Nguyen <chanh@os.amperecomputing.com> Thu Oct 05 10:55:20 2023 +0700
committer Joel Stanley <joel@jms.id.au> Fri Oct 13 14:59:03 2023 +1030
tree dcecc328dba8d443bc83b8e038811fa00fa5ed48
parent 081404fe01e2866d991c1bca11c64ca4904295a6

ARM: dts: aspeed: mtjade, mtmitchell: Add new gpio-line-names

Add new gpio-line-names from the Mt.Jade and Mt.Mitchell
HW schematic.

Mt.Jade
  GPIOB5: presence-cpu0
  GPIOF0: ps0-pgood
  GPIOF1: ps1-pgood
  GPIOG2: host0-shd-ack-n
  GPIOH0: uart1-mode1
  GPIOH1: uart2-mode1
  GPIOH2: uart3-mode1
  GPIOH3: uart4-mode1
  GPIOH7: i2c6-reset-n
  GPIOH3: host0-reboot-ack-n
  GPIOM4: s0-i2c9-alert-n
  GPIOM5: s1-i2c9-alert-n
  GPIOQ6: led-identify
  GPIOS0: s0-vr-hot-n
  GPIOS1: s1-vr-hot-n
  GPIOS5: vr-pmbus-sel-n
  GPIOY3: bmc-vga-en-n
  GPIOZ3: s0-rtc-lock
  GPIOAC2: spi0-program-sel
  GPIOAC3: spi0-backup-sel

Mt.Mitchell:
  GPIOC3: bmc-debug-mode
  GPIOE1: eth-phy-int-n
  GPIOH0: jtag-program-sel
  GPIOH1: fpga-program-b
  GPIOW3: s1-pcp-pgood

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231005035525.19036-3-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>