commit eb63875c2821cf125f133fa3292e7591dca7c7d5
author John Crispin <blogic@openwrt.org> Fri Apr 12 12:45:27 2013 +0200
committer Ralf Baechle <ralf@linux-mips.org> Wed May 08 01:19:09 2013 +0200
tree 4b150a680cd0fbcbc17a9fff037536d340ae382a
parent 946fda6f2a980d9964206191ec121774800eb030

MIPS: ralink: add uart mask to struct ralink_pinmux

Add a field for the uart muxing mask and set it inside the rt305x setup code.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5744/

arch/mips/ralink/common.h

diff --git a/arch/mips/ralink/common.h b/arch/mips/ralink/common.h
index bebd149..299119b 100644
--- a/arch/mips/ralink/common.h
+++ b/arch/mips/ralink/common.h
@@ -22,6 +22,7 @@
 	struct ralink_pinmux_grp *mode;
 	struct ralink_pinmux_grp *uart;
 	int uart_shift;
+	u32 uart_mask;
 	void (*wdt_reset)(void);
 	struct ralink_pinmux_grp *pci;
 	int pci_shift;

arch/mips/ralink/rt305x.c

diff --git a/arch/mips/ralink/rt305x.c b/arch/mips/ralink/rt305x.c
index 5b42078..6aa3cb1 100644
--- a/arch/mips/ralink/rt305x.c
+++ b/arch/mips/ralink/rt305x.c
@@ -91,12 +91,12 @@
 		.name = "gpio uartf",
 		.mask = RT305X_GPIO_MODE_GPIO_UARTF,
 		.gpio_first = RT305X_GPIO_7,
-		.gpio_last = RT305X_GPIO_14,
+		.gpio_last = RT305X_GPIO_10,
 	}, {
 		.name = "gpio i2s",
 		.mask = RT305X_GPIO_MODE_GPIO_I2S,
 		.gpio_first = RT305X_GPIO_7,
-		.gpio_last = RT305X_GPIO_14,
+		.gpio_last = RT305X_GPIO_10,
 	}, {
 		.name = "gpio",
 		.mask = RT305X_GPIO_MODE_GPIO,
@@ -118,6 +118,7 @@
 	.mode = mode_mux,
 	.uart = uart_mux,
 	.uart_shift = RT305X_GPIO_MODE_UART0_SHIFT,
+	.uart_mask = RT305X_GPIO_MODE_UART0_MASK,
 	.wdt_reset = rt305x_wdt_reset,
 };