tree be589c257ff7e2ad795e623cb5e03a8f008b480d
parent f3edefce70887d78ff88d9f179bdec5ea62a50a2
author George Shen <George.Shen@amd.com> 1637338177 -0500
committer Alex Deucher <alexander.deucher@amd.com> 1638392804 -0500

drm/amd/display: Add 16ms AUX RD interval W/A for specific LTTPR

[Why]
Certain display configurations require an extra delay before
reading lane status with certain LTTPR.

[How]
Add temporary workaround to force AUX RD interval to
16ms for CR and EQ. Needs to be refactored later.

Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: George Shen <George.Shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>