| commit | f4ce428c41fb22e3ed55496dded94df44cb920fa | [log] [tgz] |
|---|---|---|
| author | Sowjanya Komatineni <skomatineni@nvidia.com> | Tue Mar 26 22:56:29 2019 -0700 |
| committer | Mark Brown <broonie@kernel.org> | Mon Apr 01 15:39:42 2019 +0700 |
| tree | 7a792e6e31c95ca8d9acd3512a2e31d7256feba7 | |
| parent | c4fc9e5b28ff787e35137c2cc13316bb11d7657b [diff] |
spi: tegra114: configure dma burst size to fifo trig level Fixes: Configure DMA burst size to be same as SPI TX/RX trigger levels to avoid mismatch. SPI FIFO trigger levels are calculated based on the transfer length. So this patch moves DMA slave configuration to happen before start of DMAs. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>