| commit | f5ebeb138fa6eb62d90264f9619019aa8c926a22 | [log] [tgz] |
|---|---|---|
| author | Tanmay Jagdale <tanmay@marvell.com> | Tue Jun 14 17:13:56 2022 +0000 |
| committer | Will Deacon <will@kernel.org> | Fri Jun 24 13:21:38 2022 +0100 |
| tree | 1a51ad1cc05a80ed63159cc097ac19ac5d2a7e85 | |
| parent | 8e28e53f13562e3fba4c64d01dfb66a9c34167da [diff] |
perf/marvell_cn10k: Fix TAD PMU register offset The existing offset of TAD_PRF and TAD_PFC registers are incorrect. Hence, fix with the right register offsets. Also, drop read of TAD_PRF register in tad_pmu_event_counter_start() since we don't have to preserve any bit fields and always write an updated value. Signed-off-by: Tanmay Jagdale <tanmay@marvell.com> Link: https://lore.kernel.org/r/20220614171356.773967-1-tanmay@marvell.com Signed-off-by: Will Deacon <will@kernel.org>