// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
 * Device Tree Source for the RZ/{G2L,V2L} SMARC pincontrol parts
 *
 * Copyright (C) 2021 Renesas Electronics Corp.
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>

&pinctrl {
	pinctrl-0 = <&sound_clk_pins>;
	pinctrl-names = "default";

	can0_pins: can0 {
		pinmux = <RZG2L_PORT_PINMUX(10, 1, 2)>, /* TX */
			 <RZG2L_PORT_PINMUX(11, 0, 2)>; /* RX */
	};

	/* SW7 should be at position 2->3 so that GPIO8_CAN0_STB line is activated */
	can0-stb-hog {
		gpio-hog;
		gpios = <RZG2L_GPIO(42, 2) GPIO_ACTIVE_HIGH>;
		output-low;
		line-name = "can0_stb";
	};

	can1_pins: can1 {
		pinmux = <RZG2L_PORT_PINMUX(12, 1, 2)>, /* TX */
			 <RZG2L_PORT_PINMUX(13, 0, 2)>; /* RX */
	};

	/* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */
	can1-stb-hog {
		gpio-hog;
		gpios = <RZG2L_GPIO(42, 3) GPIO_ACTIVE_HIGH>;
		output-low;
		line-name = "can1_stb";
	};

	i2c0_pins: i2c0 {
		pins = "RIIC0_SDA", "RIIC0_SCL";
		input-enable;
	};

	i2c1_pins: i2c1 {
		pins = "RIIC1_SDA", "RIIC1_SCL";
		input-enable;
	};

	i2c3_pins: i2c3 {
		pinmux = <RZG2L_PORT_PINMUX(18, 0, 3)>, /* SDA */
			 <RZG2L_PORT_PINMUX(18, 1, 3)>; /* SCL */
	};

	mtu3_pins: mtu3 {
		mtu3-ext-clk-input-pin {
			pinmux = <RZG2L_PORT_PINMUX(48, 0, 4)>, /* MTCLKA */
				 <RZG2L_PORT_PINMUX(48, 1, 4)>; /* MTCLKB */
		};

		mtu3-pwm {
			pinmux = <RZG2L_PORT_PINMUX(44, 0, 4)>, /* MTIOC3A */
				 <RZG2L_PORT_PINMUX(44, 1, 4)>, /* MTIOC3B */
				 <RZG2L_PORT_PINMUX(44, 2, 4)>, /* MTIOC3C */
				 <RZG2L_PORT_PINMUX(44, 3, 4)>; /* MTIOC3D */
		};

#if MTU3_COUNTER_Z_PHASE_SIGNAL
		mtu3-zphase-clk {
			pinmux = <RZG2L_PORT_PINMUX(19, 0, 3)>; /* MTIOC1A */
		};
#endif /* MTU3_COUNTER_Z_PHASE_SIGNAL */
	};

	scif0_pins: scif0 {
		pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>,	/* TxD */
			 <RZG2L_PORT_PINMUX(38, 1, 1)>;	/* RxD */
	};

	scif2_pins: scif2 {
		pinmux = <RZG2L_PORT_PINMUX(48, 0, 1)>, /* TxD */
			 <RZG2L_PORT_PINMUX(48, 1, 1)>, /* RxD */
			 <RZG2L_PORT_PINMUX(48, 3, 1)>, /* CTS# */
			 <RZG2L_PORT_PINMUX(48, 4, 1)>; /* RTS# */
	};

	sd1-pwr-en-hog {
		gpio-hog;
		gpios = <RZG2L_GPIO(39, 2) GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "sd1_pwr_en";
	};

	sdhi1_pins: sd1 {
		sd1_data {
			pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
			power-source = <3300>;
		};

		sd1_ctrl {
			pins = "SD1_CLK", "SD1_CMD";
			power-source = <3300>;
		};

		sd1_mux {
			pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
		};
	};

	sdhi1_pins_uhs: sd1_uhs {
		sd1_data_uhs {
			pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
			power-source = <1800>;
		};

		sd1_ctrl_uhs {
			pins = "SD1_CLK", "SD1_CMD";
			power-source = <1800>;
		};

		sd1_mux_uhs {
			pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
		};
	};

	sound_clk_pins: sound_clk {
		pins = "AUDIO_CLK1", "AUDIO_CLK2";
		input-enable;
	};

	spi1_pins: spi1 {
		pinmux = <RZG2L_PORT_PINMUX(44, 0, 1)>, /* CK */
			 <RZG2L_PORT_PINMUX(44, 1, 1)>, /* MOSI */
			 <RZG2L_PORT_PINMUX(44, 2, 1)>, /* MISO */
			 <RZG2L_PORT_PINMUX(44, 3, 1)>; /* SSL */
	};

	ssi0_pins: ssi0 {
		pinmux = <RZG2L_PORT_PINMUX(45, 0, 1)>, /* BCK */
			 <RZG2L_PORT_PINMUX(45, 1, 1)>, /* RCK */
			 <RZG2L_PORT_PINMUX(45, 2, 1)>, /* TXD */
			 <RZG2L_PORT_PINMUX(45, 3, 1)>; /* RXD */
	};

	ssi1_pins: ssi1 {
		pinmux = <RZG2L_PORT_PINMUX(46, 0, 1)>, /* BCK */
			 <RZG2L_PORT_PINMUX(46, 1, 1)>, /* RCK */
			 <RZG2L_PORT_PINMUX(46, 2, 1)>; /* TXD */
	};

	usb0_pins: usb0 {
		pinmux = <RZG2L_PORT_PINMUX(4, 0, 1)>, /* VBUS */
			 <RZG2L_PORT_PINMUX(5, 0, 1)>, /* OVC */
			 <RZG2L_PORT_PINMUX(5, 1, 1)>; /* OTG_ID */
	};

	usb1_pins: usb1 {
		pinmux = <RZG2L_PORT_PINMUX(42, 0, 1)>, /* VBUS */
			 <RZG2L_PORT_PINMUX(42, 1, 1)>; /* OVC */
	};
};