commit fbeda19f82aa07082d2e1607a9f5114141dae2ac
author David Daney <ddaney@caviumnetworks.com> Wed May 13 15:59:55 2009 -0700
committer Ralf Baechle <ralf@linux-mips.org> Wed Jun 17 11:06:31 2009 +0100
tree c631cfe8884cd72a4fd709baf72e857edbbac477
parent 9cffd154cf6817b130762501b91e753524ba2cd4

MIPS: Allow CPU specific overriding of CP0 hwrena impl bits.

Some CPUs have implementation dependent rdhwr registers.  Allow them
to be enabled on a per CPU basis.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

arch/mips/kernel/traps.c

diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index e83da17..f5487179 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1502,7 +1502,7 @@
 			 status_set);
 
 	if (cpu_has_mips_r2) {
-		unsigned int enable = 0x0000000f;
+		unsigned int enable = 0x0000000f | cpu_hwrena_impl_bits;
 
 		if (!noulri && cpu_has_userlocal)
 			enable |= (1 << 29);