)]}'
{
  "commit": "4335938aa6415dc9f39bed6189c7ef5dd6296c2a",
  "tree": "462eb9aeb3fb80c7793f9e1dda2d81980941946f",
  "parents": [
    "08fe78b8918220441014c33414bd5e96a6e6fb5c"
  ],
  "author": {
    "name": "Sebastian Ene",
    "email": "sebastianene@google.com",
    "time": "Wed Jul 26 11:40:03 2023 +0000"
  },
  "committer": {
    "name": "Keir Fraser",
    "email": "keirf@google.com",
    "time": "Tue Sep 10 07:30:40 2024 +0000"
  },
  "message": "KVM: arm64: Coalesce host stage2 entries on ownership reclaim\n\nThis optimization allows us to re-create higher order block mappings in\nthe host stage2 pagetables after we teardown a guest VM. The coalescing\ncode is triggered on host_stage2_set_owner_locked path when we annotate\nthe entries in the host stage2 page-tables with an invalid entry that has\nthe owner set to PKVM_ID_HOST. This can also be triggered from\npage_relinquish when we do page insertion in the ballooning code.\n\nThis patch reintroduces the _post callback walker to be able to zap the\npage table entries on ownership re-assignment.\n\nWhen the host reclaims ownership during guest teardown, the page table\nwalker drops the refcount of the counted entries and clears out\nunreferenced entries (refcount \u003d\u003d 1). Clearing out the entry installs a\nzero PTE. When the host stage2 receives a data abort because there is no\nmapping associated, it will try to create the largest possible block\nmapping from the founded leaf entry.\nWith the current patch, we increase the chances of finding a leaf entry\nthat has level \u003c 3 if the requested region comes from a reclaimed torned\ndown VM memory. This has the advantage of reducing the TLB pressure at\nhost stage2.\n\nTo be able to do coalescing, we modify the way we do refcounting by not\ncounting the following descriptor types at host stage 2:\n- non-zero invalid PTEs\n- any descriptor that has at least one of the reserved-high bits(58-55)\ntoogled\n- non-default attribute mappings\n- page table descriptors\n\nThe algorithm works as presented below:\n\n  Is refcount(child(pte_table)) \u003d\u003d 1 ?\n\n  Yes -\u003e (because we left only default mappings)\n\tZap the table by setting 0 in the pte_table\n\tand put the page that holds the level 3 entries\n\tback into the memcache\n\n  level 2\n+---------+\n|         |\n|  ...    |\n| pte_table---+      level 3      -\u003e we can now re-create a 2Mb mapping\n|  ...    |   +---\u003e +---------+\n|         |         |         |\n|         |         |         |\n|         |         |def entry|\n+---------+         |         |\n                    |def entry|\n                    |         |\n                    |  ...    |\n                    +---------+\n\nChange-Id: I983372a0fac876336ee6799be1f3c4a50015880c\nSigned-off-by: Sebastian Ene \u003csebastianene@google.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "a34004f8c905da85ad9cb2516afe05320a9580d5",
      "old_mode": 33188,
      "old_path": "arch/arm64/include/asm/kvm_pgtable.h",
      "new_id": "b4faf2fd490954cbae50a4e3b85524414c8af778",
      "new_mode": 33188,
      "new_path": "arch/arm64/include/asm/kvm_pgtable.h"
    },
    {
      "type": "modify",
      "old_id": "11526e57a90733c8afec5b8e3cecca2ebbe93393",
      "old_mode": 33188,
      "old_path": "arch/arm64/kvm/hyp/nvhe/mem_protect.c",
      "new_id": "e38a4ccb003696886946eb5b987bcecc946eff09",
      "new_mode": 33188,
      "new_path": "arch/arm64/kvm/hyp/nvhe/mem_protect.c"
    },
    {
      "type": "modify",
      "old_id": "30b80aaf737cab4f50e2a78248b2a26e2908c65f",
      "old_mode": 33188,
      "old_path": "arch/arm64/kvm/hyp/pgtable.c",
      "new_id": "576e522d0cb869b7d886445061a2b7257c4ac322",
      "new_mode": 33188,
      "new_path": "arch/arm64/kvm/hyp/pgtable.c"
    }
  ]
}
