/*
 * Device Tree Source for the Draak board
 *
 * Copyright (C) 2016 Renesas Electronics Corp.
 * Copyright (C) 2017 Glider bvba
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

/dts-v1/;
#include "r8a77995.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Renesas Draak board based on r8a77995";
	compatible = "renesas,draak", "renesas,r8a77995";

	aliases {
		serial0 = &scif2;
		ethernet0 = &avb;
	};

	chosen {
		bootargs = "ignore_loglevel";
		stdout-path = "serial0:115200n8";
	};

	memory@48000000 {
		device_type = "memory";
		/* first 128MB is reserved for secure area. */
		reg = <0x0 0x48000000 0x0 0x18000000>;
	};
};

&extal_clk {
	clock-frequency = <48000000>;
};

&pfc {
	avb0_pins: avb {
		mux {
			groups = "avb0_link", "avb0_mdc", "avb0_mii";
			function = "avb0";
		};
	};

	pwm0_pins: pwm0 {
		groups = "pwm0_c";
		function = "pwm0";
	};

	pwm1_pins: pwm1 {
		groups = "pwm1_c";
		function = "pwm1";
	};

	scif2_pins: scif2 {
		groups = "scif2_data";
		function = "scif2";
	};

	usb0_pins: usb0 {
		groups = "usb0";
		function = "usb0";
	};
};

&ehci0 {
	status = "okay";
};

&ohci0 {
	status = "okay";
};

&avb {
	pinctrl-0 = <&avb0_pins>;
	pinctrl-names = "default";
	renesas,no-ether-link;
	phy-handle = <&phy0>;
	status = "okay";

	phy0: ethernet-phy@0 {
		rxc-skew-ps = <1500>;
		reg = <0>;
		interrupt-parent = <&gpio5>;
		interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
	};
};

&scif2 {
	pinctrl-0 = <&scif2_pins>;
	pinctrl-names = "default";

	status = "okay";
};

&usb2_phy0 {
	pinctrl-0 = <&usb0_pins>;
	pinctrl-names = "default";

	status = "okay";
};

&pwm0 {
	pinctrl-0 = <&pwm0_pins>;
	pinctrl-names = "default";

	status = "okay";
};

&pwm1 {
	pinctrl-0 = <&pwm1_pins>;
	pinctrl-names = "default";

	status = "okay";
};

&rwdt {
	timeout-sec = <60>;
	status = "okay";
};