// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree file for Globalscale Marvell ESPRESSOBin Board
 * Copyright (C) 2016 Marvell
 *
 * Romain Perier <romain.perier@free-electrons.com>
 *
 */

/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include "armada-372x.dtsi"

/ {
	chosen {
		stdout-path = "serial0:115200n8";
	};

	memory@0 {
		device_type = "memory";
		reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
	};

	vcc_sd_reg1: regulator {
		compatible = "regulator-gpio";
		regulator-name = "vcc_sd1";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;

		gpios = <&gpionb 4 GPIO_ACTIVE_HIGH>;
		gpios-states = <0>;
		states = <1800000 0x1
			  3300000 0x0>;
		enable-active-high;
	};
};

/* J9 */
&pcie0 {
	status = "okay";
	phys = <&comphy1 0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
};

/* J6 */
&sata {
	status = "okay";
	phys = <&comphy2 0>;
	phy-names = "sata-phy";
};

/* J1 */
&sdhci1 {
	wp-inverted;
	bus-width = <4>;
	cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>;
	marvell,pad-type = "sd";
	vqmmc-supply = <&vcc_sd_reg1>;

	pinctrl-names = "default";
	pinctrl-0 = <&sdio_pins>;
	status = "okay";
};

&spi0 {
	status = "okay";

	flash@0 {
		reg = <0>;
		compatible = "jedec,spi-nor";
		spi-max-frequency = <104000000>;
		m25p,fast-read;
	};
};

/* Exported on the micro USB connector J5 through an FTDI */
&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;
	status = "okay";
};

/*
 * Connector J17 and J18 expose a number of different features. Some pins are
 * multiplexed. This is the case for instance for the following features:
 * - UART1 (pin 24 = RX, pin 26 = TX). See armada-3720-db.dts for an example of
 *   how to enable it. Beware that the signals are 1.8V TTL.
 * - I2C
 * - SPI
 * - MMC
 */

/* J7 */
&usb3 {
	status = "okay";
};

/* J8 */
&usb2 {
	status = "okay";
};

&mdio {
	switch0: switch0@1 {
		compatible = "marvell,mv88e6085";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <1>;

		dsa,member = <0 0>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				label = "cpu";
				ethernet = <&eth0>;
				phy-mode = "rgmii-id";
				fixed-link {
					speed = <1000>;
					full-duplex;
				};
			};

			port@1 {
				reg = <1>;
				label = "wan";
				phy-handle = <&switch0phy0>;
			};

			port@2 {
				reg = <2>;
				label = "lan0";
				phy-handle = <&switch0phy1>;
			};

			port@3 {
				reg = <3>;
				label = "lan1";
				phy-handle = <&switch0phy2>;
			};

		};

		mdio {
			#address-cells = <1>;
			#size-cells = <0>;

			switch0phy0: switch0phy0@11 {
				reg = <0x11>;
			};
			switch0phy1: switch0phy1@12 {
				reg = <0x12>;
			};
			switch0phy2: switch0phy2@13 {
				reg = <0x13>;
			};
		};
	};
};

&eth0 {
	pinctrl-names = "default";
	pinctrl-0 = <&rgmii_pins>, <&smi_pins>;
	phy-mode = "rgmii-id";
	status = "okay";

	fixed-link {
		speed = <1000>;
		full-duplex;
	};
};