blob: 73cbd0bb1975a071063ff3cc70165d721e1fb96b [file] [log] [blame]
Thomas Gleixnerc88a15c2019-05-28 10:10:20 -07001/* SPDX-License-Identifier: GPL-2.0-only */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002/*
3 * drivers/parisc/gsc.h
4 * Declarations for functions in gsc.c
5 * Copyright (c) 2000-2002 Helge Deller, Matthew Wilcox
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 */
7
8#include <linux/interrupt.h>
9#include <asm/hardware.h>
10#include <asm/parisc-device.h>
11
12#define OFFSET_IRR 0x0000 /* Interrupt request register */
13#define OFFSET_IMR 0x0004 /* Interrupt mask register */
14#define OFFSET_IPR 0x0008 /* Interrupt pending register */
15#define OFFSET_ICR 0x000C /* Interrupt control register */
16#define OFFSET_IAR 0x0010 /* Interrupt address register */
17
18/* PA I/O Architected devices support at least 5 bits in the EIM register. */
19#define GSC_EIM_WIDTH 5
20
21struct gsc_irq {
22 unsigned long txn_addr; /* IRQ "target" */
23 int txn_data; /* HW "IRQ" */
24 int irq; /* virtual IRQ */
25};
26
27struct gsc_asic {
28 struct parisc_device *gsc;
29 unsigned long hpa;
30 char *name;
31 int version;
32 int type;
33 int eim;
Helge Deller939fc852022-03-27 15:46:26 +020034 struct gsc_irq gsc_irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -070035 int global_irq[32];
36};
37
38int gsc_common_setup(struct parisc_device *parent, struct gsc_asic *gsc_asic);
39int gsc_alloc_irq(struct gsc_irq *dev); /* dev needs an irq */
40int gsc_claim_irq(struct gsc_irq *dev, int irq); /* dev needs this irq */
Thomas Gleixnerdfe07562009-06-10 19:56:04 +000041int gsc_assign_irq(struct irq_chip *type, void *data);
Linus Torvalds1da177e2005-04-16 15:20:36 -070042int gsc_find_local_irq(unsigned int irq, int *global_irq, int limit);
43void gsc_fixup_irqs(struct parisc_device *parent, void *ctrl,
44 void (*choose)(struct parisc_device *child, void *ctrl));
45void gsc_asic_assign_irq(struct gsc_asic *asic, int local_irq, int *irqp);
46
David Howells7d12e782006-10-05 14:55:46 +010047irqreturn_t gsc_asic_intr(int irq, void *dev);