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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001# SPDX-License-Identifier: GPL-2.0
Chris Zankel8e1a6dd2005-06-23 22:01:10 -07002config XTENSA
Johannes Weiner35f9cd082009-03-04 16:21:28 +01003 def_bool y
Max Filippov4a7f50f2018-09-11 22:12:59 -07004 select ARCH_HAS_SG_CHAIN
Christoph Hellwig3f2bbf42018-06-19 09:03:16 +02005 select ARCH_HAS_SYNC_DMA_FOR_CPU
6 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
Vladimir Murzin07c75d72017-06-28 10:16:57 +01007 select ARCH_NO_COHERENT_DMA_MMAP if !MMU
Max Filippov8f371c72013-04-15 09:21:35 +04008 select ARCH_WANT_FRAME_POINTERS
Max Filippove9691612013-01-06 16:17:21 +04009 select ARCH_WANT_IPC_PARSE_VERSION
Max Filippov25df8192014-02-18 15:29:11 +040010 select BUILDTIME_EXTABLE_SORT
Al Viro3e41f9b2012-10-26 23:41:40 -040011 select CLONE_BACKWARDS
Max Filippovbda89322014-01-29 06:20:46 +040012 select COMMON_CLK
Christoph Hellwigbc3ec752018-09-08 11:22:43 +020013 select DMA_DIRECT_OPS
Max Filippov920f8a392014-06-16 08:20:17 +040014 select GENERIC_ATOMIC64
15 select GENERIC_CLOCKEVENTS
16 select GENERIC_IRQ_SHOW
17 select GENERIC_PCI_IOMAP
18 select GENERIC_SCHED_CLOCK
Max Filippov57358ba92017-12-17 14:43:15 -080019 select GENERIC_STRNCPY_FROM_USER if KASAN
Max Filippovc6335442017-12-03 13:28:52 -080020 select HAVE_ARCH_KASAN if MMU
Max Filippov0e46c112016-04-25 22:08:20 +030021 select HAVE_DEBUG_KMEMLEAK
Max Filippov9d2ffe52016-04-25 22:08:52 +030022 select HAVE_DMA_CONTIGUOUS
Jiri Slaby5f56a5d2016-05-20 17:00:16 -070023 select HAVE_EXIT_THREAD
Max Filippov920f8a392014-06-16 08:20:17 +040024 select HAVE_FUNCTION_TRACER
Max Filippovd951ba22015-09-30 15:17:35 +030025 select HAVE_FUTEX_CMPXCHG if !MMU
Max Filippovc91e02b2016-01-24 10:32:10 +030026 select HAVE_HW_BREAKPOINT if PERF_EVENTS
Max Filippov920f8a392014-06-16 08:20:17 +040027 select HAVE_IRQ_TIME_ACCOUNTING
28 select HAVE_OPROFILE
29 select HAVE_PERF_EVENTS
Masahiro Yamadad148eac2018-06-14 19:36:45 +090030 select HAVE_STACKPROTECTOR
Max Filippov920f8a392014-06-16 08:20:17 +040031 select IRQ_DOMAIN
32 select MODULES_USE_ELF_RELA
Max Filippovdb8165f2015-06-04 13:41:27 +030033 select PERF_USE_VMALLOC
Max Filippov920f8a392014-06-16 08:20:17 +040034 select VIRT_TO_BUS
Chris Zankel8e1a6dd2005-06-23 22:01:10 -070035 help
36 Xtensa processors are 32-bit RISC machines designed by Tensilica
37 primarily for embedded systems. These processors are both
38 configurable and extensible. The Linux port to the Xtensa
39 architecture supports all processor configurations and extensions,
40 with reasonable minimum requirements. The Xtensa Linux project has
Masanari Iida0ada4492013-01-04 17:29:18 +090041 a home page at <http://www.linux-xtensa.org/>.
Chris Zankel8e1a6dd2005-06-23 22:01:10 -070042
Chris Zankel8e1a6dd2005-06-23 22:01:10 -070043config RWSEM_XCHGADD_ALGORITHM
Johannes Weiner35f9cd082009-03-04 16:21:28 +010044 def_bool y
Chris Zankel8e1a6dd2005-06-23 22:01:10 -070045
Akinobu Mitad4337aa2006-03-26 01:39:43 -080046config GENERIC_HWEIGHT
Johannes Weiner35f9cd082009-03-04 16:21:28 +010047 def_bool y
Akinobu Mitad4337aa2006-03-26 01:39:43 -080048
David Howellsf0d1b0b2006-12-08 02:37:49 -080049config ARCH_HAS_ILOG2_U32
Johannes Weiner35f9cd082009-03-04 16:21:28 +010050 def_bool n
David Howellsf0d1b0b2006-12-08 02:37:49 -080051
52config ARCH_HAS_ILOG2_U64
Johannes Weiner35f9cd082009-03-04 16:21:28 +010053 def_bool n
David Howellsf0d1b0b2006-12-08 02:37:49 -080054
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -070055config NO_IOPORT_MAP
Max Filippovd046f772012-09-17 05:44:41 +040056 def_bool n
Al Viro5ea81762007-02-11 15:41:31 +000057
H. Peter Anvinbdc80782008-02-08 04:21:26 -080058config HZ
59 int
60 default 100
61
Max Filippov8f371c72013-04-15 09:21:35 +040062config LOCKDEP_SUPPORT
63 def_bool y
64
Max Filippov3e4196a2013-04-15 09:20:48 +040065config STACKTRACE_SUPPORT
66 def_bool y
67
Max Filippovc92931b2013-03-31 06:32:42 +040068config TRACE_IRQFLAGS_SUPPORT
69 def_bool y
70
Johannes Weiner35f9cd082009-03-04 16:21:28 +010071config MMU
Max Filippovde7c1c72015-06-27 07:31:12 +030072 def_bool n
Johannes Weiner35f9cd082009-03-04 16:21:28 +010073
Baruch Siacha1a2bde2013-12-18 09:10:29 +020074config HAVE_XTENSA_GPIO32
75 def_bool n
76
Max Filippovc6335442017-12-03 13:28:52 -080077config KASAN_SHADOW_OFFSET
78 hex
79 default 0x6e400000
80
Chris Zankel8e1a6dd2005-06-23 22:01:10 -070081menu "Processor type and features"
82
83choice
84 prompt "Xtensa Processor Configuration"
Chris Zankel173d6682006-12-10 02:18:48 -080085 default XTENSA_VARIANT_FSF
Chris Zankel8e1a6dd2005-06-23 22:01:10 -070086
Chris Zankel173d6682006-12-10 02:18:48 -080087config XTENSA_VARIANT_FSF
Chris Zankel00254272008-10-21 09:11:43 -070088 bool "fsf - default (not generic) configuration"
Johannes Weiner35f9cd082009-03-04 16:21:28 +010089 select MMU
Chris Zankel00254272008-10-21 09:11:43 -070090
91config XTENSA_VARIANT_DC232B
92 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
Johannes Weiner35f9cd082009-03-04 16:21:28 +010093 select MMU
Baruch Siacha1a2bde2013-12-18 09:10:29 +020094 select HAVE_XTENSA_GPIO32
Chris Zankel00254272008-10-21 09:11:43 -070095 help
Johannes Weiner35f9cd082009-03-04 16:21:28 +010096 This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE).
Johannes Weiner000af2c2009-03-04 16:21:32 +010097
Pete Delaneyd0b73b42013-01-05 04:57:16 +040098config XTENSA_VARIANT_DC233C
99 bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
100 select MMU
Baruch Siacha1a2bde2013-12-18 09:10:29 +0200101 select HAVE_XTENSA_GPIO32
Pete Delaneyd0b73b42013-01-05 04:57:16 +0400102 help
103 This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE).
104
Max Filippov420ae952014-06-16 07:25:06 +0400105config XTENSA_VARIANT_CUSTOM
106 bool "Custom Xtensa processor configuration"
Max Filippov420ae952014-06-16 07:25:06 +0400107 select HAVE_XTENSA_GPIO32
108 help
109 Select this variant to use a custom Xtensa processor configuration.
110 You will be prompted for a processor variant CORENAME.
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700111endchoice
112
Max Filippov420ae952014-06-16 07:25:06 +0400113config XTENSA_VARIANT_CUSTOM_NAME
114 string "Xtensa Processor Custom Core Variant Name"
115 depends on XTENSA_VARIANT_CUSTOM
116 help
117 Provide the name of a custom Xtensa processor variant.
118 This CORENAME selects arch/xtensa/variant/CORENAME.
119 Dont forget you have to select MMU if you have one.
120
121config XTENSA_VARIANT_NAME
122 string
123 default "dc232b" if XTENSA_VARIANT_DC232B
124 default "dc233c" if XTENSA_VARIANT_DC233C
125 default "fsf" if XTENSA_VARIANT_FSF
Max Filippov420ae952014-06-16 07:25:06 +0400126 default XTENSA_VARIANT_CUSTOM_NAME if XTENSA_VARIANT_CUSTOM
127
128config XTENSA_VARIANT_MMU
129 bool "Core variant has a Full MMU (TLB, Pages, Protection, etc)"
130 depends on XTENSA_VARIANT_CUSTOM
131 default y
Max Filippovde7c1c72015-06-27 07:31:12 +0300132 select MMU
Max Filippov420ae952014-06-16 07:25:06 +0400133 help
134 Build a Conventional Kernel with full MMU support,
135 ie: it supports a TLB with auto-loading, page protection.
136
Max Filippov9bd46da2015-06-14 01:41:25 +0300137config XTENSA_VARIANT_HAVE_PERF_EVENTS
138 bool "Core variant has Performance Monitor Module"
139 depends on XTENSA_VARIANT_CUSTOM
140 default n
141 help
142 Enable if core variant has Performance Monitor Module with
143 External Registers Interface.
144
145 If unsure, say N.
146
Max Filippove4629192015-11-27 16:26:41 +0300147config XTENSA_FAKE_NMI
148 bool "Treat PMM IRQ as NMI"
149 depends on XTENSA_VARIANT_HAVE_PERF_EVENTS
150 default n
151 help
152 If PMM IRQ is the only IRQ at EXCM level it is safe to
153 treat it as NMI, which improves accuracy of profiling.
154
155 If there are other interrupts at or above PMM IRQ priority level
156 but not above the EXCM level, PMM IRQ still may be treated as NMI,
157 but only if these IRQs are not used. There will be a build warning
158 saying that this is not safe, and a bugcheck if one of these IRQs
159 actually fire.
160
161 If unsure, say N.
162
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700163config XTENSA_UNALIGNED_USER
164 bool "Unaligned memory access in use space"
Johannes Weiner35f9cd082009-03-04 16:21:28 +0100165 help
166 The Xtensa architecture currently does not handle unaligned
167 memory accesses in hardware but through an exception handler.
168 Per default, unaligned memory accesses are disabled in user space.
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700169
Johannes Weiner35f9cd082009-03-04 16:21:28 +0100170 Say Y here to enable unaligned memory access in user space.
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700171
Max Filippovf6151362013-10-17 02:42:26 +0400172config HAVE_SMP
173 bool "System Supports SMP (MX)"
Max Filippovde7c1c72015-06-27 07:31:12 +0300174 depends on XTENSA_VARIANT_CUSTOM
Max Filippovf6151362013-10-17 02:42:26 +0400175 select XTENSA_MX
176 help
177 This option is use to indicate that the system-on-a-chip (SOC)
178 supports Multiprocessing. Multiprocessor support implemented above
179 the CPU core definition and currently needs to be selected manually.
180
181 Multiprocessor support in implemented with external cache and
Masanari Iida769a12a2015-04-27 22:52:07 +0900182 interrupt controllers.
Max Filippovf6151362013-10-17 02:42:26 +0400183
184 The MX interrupt distributer adds Interprocessor Interrupts
185 and causes the IRQ numbers to be increased by 4 for devices
186 like the open cores ethernet driver and the serial interface.
187
188 You still have to select "Enable SMP" to enable SMP on this SOC.
189
190config SMP
191 bool "Enable Symmetric multi-processing support"
192 depends on HAVE_SMP
Max Filippovf6151362013-10-17 02:42:26 +0400193 select GENERIC_SMP_IDLE_THREAD
194 help
195 Enabled SMP Software; allows more than one CPU/CORE
196 to be activated during startup.
197
198config NR_CPUS
199 depends on SMP
200 int "Maximum number of CPUs (2-32)"
201 range 2 32
202 default "4"
203
Max Filippov49b424f2013-10-17 02:42:28 +0400204config HOTPLUG_CPU
205 bool "Enable CPU hotplug support"
206 depends on SMP
207 help
208 Say Y here to allow turning CPUs off and on. CPUs can be
209 controlled through /sys/devices/system/cpu.
210
211 Say N if you want to disable CPU hotplug.
212
Max Filippove85e3352012-12-03 15:01:43 +0400213config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
214 bool "Initialize Xtensa MMU inside the Linux kernel code"
Max Filippova4c6be52016-09-29 10:51:05 -0700215 depends on !XTENSA_VARIANT_FSF && !XTENSA_VARIANT_DC232B
Max Filippov73a3eed2016-08-04 15:45:32 +0300216 default y if XTENSA_VARIANT_DC233C || XTENSA_VARIANT_CUSTOM
Max Filippove85e3352012-12-03 15:01:43 +0400217 help
218 Earlier version initialized the MMU in the exception vector
219 before jumping to _startup in head.S and had an advantage that
220 it was possible to place a software breakpoint at 'reset' and
221 then enter your normal kernel breakpoints once the MMU was mapped
222 to the kernel mappings (0XC0000000).
223
Masanari Iida83fc61a2017-09-26 12:47:59 +0900224 This unfortunately won't work for U-Boot and likely also wont
Max Filippove85e3352012-12-03 15:01:43 +0400225 work for using KEXEC to have a hot kernel ready for doing a
226 KDUMP.
227
228 So now the MMU is initialized in head.S but it's necessary to
229 use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup.
230 xt-gdb can't place a Software Breakpoint in the 0XD region prior
231 to mapping the MMU and after mapping even if the area of low memory
232 was mapped gdb wouldn't remove the breakpoint on hitting it as the
233 PC wouldn't match. Since Hardware Breakpoints are recommended for
234 Linux configurations it seems reasonable to just assume they exist
235 and leave this older mechanism for unfortunate souls that choose
236 not to follow Tensilica's recommendation.
237
238 Selecting this will cause U-Boot to set the KERNEL Load and Entry
239 address at 0x00003000 instead of the mapped std of 0xD0003000.
240
241 If in doubt, say Y.
242
Max Filippov7bb516ca2018-08-12 06:01:40 -0700243config MEMMAP_CACHEATTR
244 hex "Cache attributes for the memory address space"
245 depends on !MMU
246 default 0x22222222
247 help
248 These cache attributes are set up for noMMU systems. Each hex digit
249 specifies cache attributes for the corresponding 512MB memory
250 region: bits 0..3 -- for addresses 0x00000000..0x1fffffff,
251 bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on.
252
253 Cache attribute values are specific for the MMU type, so e.g.
254 for region protection MMUs: 2 is cache bypass, 4 is WB cached,
255 1 is WT cached, f is illegal. For ful MMU: bit 0 makes it executable,
256 bit 1 makes it writable, bits 2..3 meaning is 0: cache bypass,
257 1: WB cache, 2: WT cache, 3: special (c and e are illegal, f is
258 reserved).
259
Max Filippovd39af902016-04-11 21:14:17 +0300260config KSEG_PADDR
261 hex "Physical address of the KSEG mapping"
262 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU
263 default 0x00000000
264 help
265 This is the physical address where KSEG is mapped. Please refer to
266 the chosen KSEG layout help for the required address alignment.
267 Unpacked kernel image (including vectors) must be located completely
268 within KSEG.
269 Physical memory below this address is not available to linux.
270
271 If unsure, leave the default value here.
272
Max Filippova9f2fc62016-04-13 05:20:02 +0300273config KERNEL_LOAD_ADDRESS
274 hex "Kernel load address"
Max Filippov73a3eed2016-08-04 15:45:32 +0300275 default 0x60003000 if !MMU
276 default 0x00003000 if MMU && INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
277 default 0xd0003000 if MMU && !INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
Max Filippova9f2fc62016-04-13 05:20:02 +0300278 help
279 This is the address where the kernel is loaded.
280 It is virtual address for MMUv2 configurations and physical address
281 for all other configurations.
282
283 If unsure, leave the default value here.
284
285config VECTORS_OFFSET
286 hex "Kernel vectors offset"
287 default 0x00003000
288 help
289 This is the offset of the kernel image from the relocatable vectors
290 base.
291
292 If unsure, leave the default value here.
293
Max Filippovd39af902016-04-11 21:14:17 +0300294choice
295 prompt "KSEG layout"
296 depends on MMU
297 default XTENSA_KSEG_MMU_V2
298
299config XTENSA_KSEG_MMU_V2
300 bool "MMUv2: 128MB cached + 128MB uncached"
301 help
302 MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting
303 at KSEG_PADDR to 0xd0000000 with cache and to 0xd8000000
304 without cache.
305 KSEG_PADDR must be aligned to 128MB.
306
307config XTENSA_KSEG_256M
308 bool "256MB cached + 256MB uncached"
309 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
310 help
311 TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000
312 with cache and to 0xc0000000 without cache.
313 KSEG_PADDR must be aligned to 256MB.
314
315config XTENSA_KSEG_512M
316 bool "512MB cached + 512MB uncached"
317 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
318 help
319 TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000
320 with cache and to 0xc0000000 without cache.
321 KSEG_PADDR must be aligned to 256MB.
322
323endchoice
324
Max Filippov655591002014-02-04 02:17:09 +0400325config HIGHMEM
326 bool "High Memory Support"
Max Filippov8a9de052014-06-16 08:15:43 +0400327 depends on MMU
Max Filippov655591002014-02-04 02:17:09 +0400328 help
329 Linux can use the full amount of RAM in the system by
330 default. However, the default MMUv2 setup only maps the
331 lowermost 128 MB of memory linearly to the areas starting
332 at 0xd0000000 (cached) and 0xd8000000 (uncached).
333 When there are more than 128 MB memory in the system not
334 all of it can be "permanently mapped" by the kernel.
335 The physical memory that's not permanently mapped is called
336 "high memory".
337
338 If you are compiling a kernel which will never run on a
339 machine with more than 128 MB total physical RAM, answer
340 N here.
341
342 If unsure, say Y.
343
Max Filippov91842892014-08-07 03:32:30 +0400344config FAST_SYSCALL_XTENSA
345 bool "Enable fast atomic syscalls"
346 default n
347 help
348 fast_syscall_xtensa is a syscall that can make atomic operations
349 on UP kernel when processor has no s32c1i support.
350
351 This syscall is deprecated. It may have issues when called with
352 invalid arguments. It is provided only for backwards compatibility.
353 Only enable it if your userspace software requires it.
354
355 If unsure, say N.
356
357config FAST_SYSCALL_SPILL_REGISTERS
358 bool "Enable spill registers syscall"
359 default n
360 help
361 fast_syscall_spill_registers is a syscall that spills all active
362 register windows of a calling userspace task onto its stack.
363
364 This syscall is deprecated. It may have issues when called with
365 invalid arguments. It is provided only for backwards compatibility.
366 Only enable it if your userspace software requires it.
367
368 If unsure, say N.
369
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700370endmenu
371
Johannes Weiner35f9cd082009-03-04 16:21:28 +0100372config XTENSA_CALIBRATE_CCOUNT
373 def_bool n
374 help
375 On some platforms (XT2000, for example), the CPU clock rate can
376 vary. The frequency can be determined, however, by measuring
377 against a well known, fixed frequency, such as an UART oscillator.
378
379config SERIAL_CONSOLE
380 def_bool n
381
Johannes Weiner35f9cd082009-03-04 16:21:28 +0100382menu "Bus options"
383
384config PCI
385 bool "PCI support"
386 default y
387 help
388 Find out whether you have a PCI motherboard. PCI is the name of a
389 bus system, i.e. the way the CPU talks to the other stuff inside
390 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
391 VESA. If you have PCI, say Y, otherwise N.
392
393source "drivers/pci/Kconfig"
394
Chris Zankel35e71f92009-04-16 00:25:39 -0700395endmenu
396
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700397menu "Platform options"
398
399choice
400 prompt "Xtensa System Type"
401 default XTENSA_PLATFORM_ISS
402
403config XTENSA_PLATFORM_ISS
404 bool "ISS"
Johannes Weiner35f9cd082009-03-04 16:21:28 +0100405 select XTENSA_CALIBRATE_CCOUNT
406 select SERIAL_CONSOLE
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700407 help
408 ISS is an acronym for Tensilica's Instruction Set Simulator.
409
410config XTENSA_PLATFORM_XT2000
411 bool "XT2000"
Max Filippov49645272014-06-16 08:25:43 +0400412 select HAVE_IDE
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700413 help
414 XT2000 is the name of Tensilica's feature-rich emulation platform.
415 This hardware is capable of running a full Linux distribution.
416
Max Filippov0d456bad2012-11-05 07:37:14 +0400417config XTENSA_PLATFORM_XTFPGA
418 bool "XTFPGA"
Max Filippov61e47e92014-10-04 04:44:04 +0400419 select ETHOC if ETHERNET
Max Filippov3de00482016-07-23 02:47:58 +0300420 select PLATFORM_WANT_DEFAULT_MEM if !MMU
Max Filippov0d456bad2012-11-05 07:37:14 +0400421 select SERIAL_CONSOLE
Max Filippov0d456bad2012-11-05 07:37:14 +0400422 select XTENSA_CALIBRATE_CCOUNT
423 help
424 XTFPGA is the name of Tensilica board family (LX60, LX110, LX200, ML605).
425 This hardware is capable of running a full Linux distribution.
426
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700427endchoice
428
Max Filippov994fa1c2018-08-13 18:11:38 -0700429config PLATFORM_NR_IRQS
430 int
431 default 3 if XTENSA_PLATFORM_XT2000
432 default 0
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700433
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700434config XTENSA_CPU_CLOCK
435 int "CPU clock rate [MHz]"
436 depends on !XTENSA_CALIBRATE_CCOUNT
Johannes Weiner35f9cd082009-03-04 16:21:28 +0100437 default 16
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700438
439config GENERIC_CALIBRATE_DELAY
440 bool "Auto calibration of the BogoMIPS value"
Johannes Weiner35f9cd082009-03-04 16:21:28 +0100441 help
Chris Zankel82300bf2005-06-30 02:58:58 -0700442 The BogoMIPS value can easily be derived from the CPU frequency.
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700443
444config CMDLINE_BOOL
445 bool "Default bootloader kernel arguments"
446
447config CMDLINE
448 string "Initial kernel command string"
449 depends on CMDLINE_BOOL
450 default "console=ttyS0,38400 root=/dev/ram"
451 help
452 On some architectures (EBSA110 and CATS), there is currently no way
453 for the boot loader to pass arguments to the kernel. For these
454 architectures, you should supply some command-line options at build
455 time by entering them here. As a minimum, you should specify the
456 memory size and the root device (e.g., mem=64M root=/dev/nfs).
457
Max Filippovda844a82012-11-04 00:30:13 +0400458config USE_OF
459 bool "Flattened Device Tree support"
460 select OF
461 select OF_EARLY_FLATTREE
Max Filippov4e7c84e2016-07-19 00:37:05 +0300462 select OF_RESERVED_MEM
Max Filippovda844a82012-11-04 00:30:13 +0400463 help
464 Include support for flattened device tree machine descriptions.
465
466config BUILTIN_DTB
467 string "DTB to build into the kernel image"
468 depends on OF
469
Max Filippovbaac1d362018-08-13 18:56:37 -0700470config PARSE_BOOTPARAM
471 bool "Parse bootparam block"
472 default y
473 help
474 Parse parameters passed to the kernel from the bootloader. It may
475 be disabled if the kernel is known to run without the bootloader.
476
477 If unsure, say Y.
478
Victor Prupisb6c7e872008-05-19 14:50:38 -0700479config BLK_DEV_SIMDISK
480 tristate "Host file-based simulated block device support"
481 default n
Max Filippov7a0684c2014-08-27 14:54:48 +0400482 depends on XTENSA_PLATFORM_ISS && BLOCK
Victor Prupisb6c7e872008-05-19 14:50:38 -0700483 help
484 Create block devices that map to files in the host file system.
485 Device binding to host file may be changed at runtime via proc
486 interface provided the device is not in use.
487
488config BLK_DEV_SIMDISK_COUNT
489 int "Number of host file-based simulated block devices"
490 range 1 10
491 depends on BLK_DEV_SIMDISK
492 default 2
493 help
494 This is the default minimal number of created block devices.
495 Kernel/module parameter 'simdisk_count' may be used to change this
496 value at runtime. More file names (but no more than 10) may be
497 specified as parameters, simdisk_count grows accordingly.
498
499config SIMDISK0_FILENAME
500 string "Host filename for the first simulated device"
501 depends on BLK_DEV_SIMDISK = y
502 default ""
503 help
504 Attach a first simdisk to a host file. Conventionally, this file
505 contains a root file system.
506
507config SIMDISK1_FILENAME
508 string "Host filename for the second simulated device"
509 depends on BLK_DEV_SIMDISK = y && BLK_DEV_SIMDISK_COUNT != 1
510 default ""
511 help
512 Another simulated disk in a host file for a buildroot-independent
513 storage.
514
Max Filippova9df9332015-11-02 17:51:02 +0300515config FORCE_MAX_ZONEORDER
516 int "Maximum zone order"
517 default "11"
518 help
519 The kernel memory allocator divides physically contiguous memory
520 blocks into "zones", where each zone is a power of two number of
521 pages. This option selects the largest power of two that the kernel
522 keeps in the memory allocator. If you need to allocate very large
523 blocks of physically contiguous memory, then you may need to
524 increase this value.
525
526 This config option is actually maximum order plus one. For example,
527 a value of 11 means that the largest free memory block is 2^10 pages.
528
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700529source "drivers/pcmcia/Kconfig"
530
Max Filippov3932b9c2014-10-04 04:45:39 +0400531config PLATFORM_WANT_DEFAULT_MEM
532 def_bool n
533
534config DEFAULT_MEM_START
Max Filippovaea731c2018-08-13 16:45:54 -0700535 hex
536 prompt "PAGE_OFFSET/PHYS_OFFSET" if !MMU && PLATFORM_WANT_DEFAULT_MEM
537 default 0x60000000 if PLATFORM_WANT_DEFAULT_MEM
538 default 0x00000000
Max Filippov3932b9c2014-10-04 04:45:39 +0400539 help
Max Filippovaea731c2018-08-13 16:45:54 -0700540 This is the base address used for both PAGE_OFFSET and PHYS_OFFSET
541 in noMMU configurations.
Max Filippov3932b9c2014-10-04 04:45:39 +0400542
543 If unsure, leave the default value here.
544
Max Filippov49490092015-02-27 06:28:00 +0300545config XTFPGA_LCD
546 bool "Enable XTFPGA LCD driver"
547 depends on XTENSA_PLATFORM_XTFPGA
548 default n
549 help
550 There's a 2x16 LCD on most of XTFPGA boards, kernel may output
551 progress messages there during bootup/shutdown. It may be useful
552 during board bringup.
553
554 If unsure, say N.
555
556config XTFPGA_LCD_BASE_ADDR
557 hex "XTFPGA LCD base address"
558 depends on XTFPGA_LCD
559 default "0x0d0c0000"
560 help
561 Base address of the LCD controller inside KIO region.
562 Different boards from XTFPGA family have LCD controller at different
563 addresses. Please consult prototyping user guide for your board for
564 the correct address. Wrong address here may lead to hardware lockup.
565
566config XTFPGA_LCD_8BIT_ACCESS
567 bool "Use 8-bit access to XTFPGA LCD"
568 depends on XTFPGA_LCD
569 default n
570 help
571 LCD may be connected with 4- or 8-bit interface, 8-bit access may
572 only be used with 8-bit interface. Please consult prototyping user
573 guide for your board for the correct interface width.
574
Chris Zankel8e1a6dd2005-06-23 22:01:10 -0700575endmenu
576
Max Filippove00d8b22014-10-29 01:42:01 +0300577menu "Power management options"
578
579source "kernel/power/Kconfig"
580
581endmenu