Thomas Gleixner | 0fdebc5 | 2022-06-07 16:11:14 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Viresh Kumar | e3978dc | 2012-04-19 22:23:13 +0530 | [diff] [blame] | 2 | /* |
| 3 | * arch/arm/mach-spear13xx/spear13xx.c |
| 4 | * |
| 5 | * SPEAr13XX machines common source file |
| 6 | * |
| 7 | * Copyright (C) 2012 ST Microelectronics |
Viresh Kumar | da89947 | 2015-07-17 16:23:50 -0700 | [diff] [blame] | 8 | * Viresh Kumar <vireshk@kernel.org> |
Viresh Kumar | e3978dc | 2012-04-19 22:23:13 +0530 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #define pr_fmt(fmt) "SPEAr13xx: " fmt |
| 12 | |
| 13 | #include <linux/amba/pl022.h> |
| 14 | #include <linux/clk.h> |
Lee Jones | f2ad937 | 2021-01-26 12:45:38 +0000 | [diff] [blame] | 15 | #include <linux/clk/spear.h> |
Rob Herring | da4a686 | 2013-02-06 21:17:47 -0600 | [diff] [blame] | 16 | #include <linux/clocksource.h> |
Viresh Kumar | e3978dc | 2012-04-19 22:23:13 +0530 | [diff] [blame] | 17 | #include <linux/err.h> |
Rob Herring | 0529e315 | 2012-11-05 16:18:28 -0600 | [diff] [blame] | 18 | #include <linux/of.h> |
Viresh Kumar | e3978dc | 2012-04-19 22:23:13 +0530 | [diff] [blame] | 19 | #include <asm/hardware/cache-l2x0.h> |
Viresh Kumar | e3978dc | 2012-04-19 22:23:13 +0530 | [diff] [blame] | 20 | #include <asm/mach/map.h> |
Arnd Bergmann | c164620 | 2022-04-28 09:44:23 +0200 | [diff] [blame] | 21 | #include "spear.h" |
Arnd Bergmann | 442a33e | 2013-05-06 23:43:45 +0200 | [diff] [blame] | 22 | #include "generic.h" |
Viresh Kumar | e3978dc | 2012-04-19 22:23:13 +0530 | [diff] [blame] | 23 | |
Viresh Kumar | e3978dc | 2012-04-19 22:23:13 +0530 | [diff] [blame] | 24 | void __init spear13xx_l2x0_init(void) |
| 25 | { |
| 26 | /* |
| 27 | * 512KB (64KB/way), 8-way associativity, parity supported |
| 28 | * |
Julia Lawall | 339ac71 | 2022-03-18 11:37:16 +0100 | [diff] [blame] | 29 | * FIXME: 9th bit, of Auxiliary Controller register must be set |
Viresh Kumar | e3978dc | 2012-04-19 22:23:13 +0530 | [diff] [blame] | 30 | * for some spear13xx devices for stable L2 operation. |
| 31 | * |
| 32 | * Enable Early BRESP, L2 prefetch for Instruction and Data, |
| 33 | * write alloc and 'Full line of zero' options |
| 34 | * |
| 35 | */ |
Olof Johansson | 5497e7b | 2013-05-09 13:05:00 -0700 | [diff] [blame] | 36 | if (!IS_ENABLED(CONFIG_CACHE_L2X0)) |
| 37 | return; |
Viresh Kumar | e3978dc | 2012-04-19 22:23:13 +0530 | [diff] [blame] | 38 | |
Russell King | 1a5a954 | 2014-03-16 20:52:25 +0000 | [diff] [blame] | 39 | writel_relaxed(0x06, VA_L2CC_BASE + L310_PREFETCH_CTRL); |
Viresh Kumar | e3978dc | 2012-04-19 22:23:13 +0530 | [diff] [blame] | 40 | |
| 41 | /* |
| 42 | * Program following latencies in order to make |
| 43 | * SPEAr1340 work at 600 MHz |
| 44 | */ |
Russell King | 1a5a954 | 2014-03-16 20:52:25 +0000 | [diff] [blame] | 45 | writel_relaxed(0x221, VA_L2CC_BASE + L310_TAG_LATENCY_CTRL); |
| 46 | writel_relaxed(0x441, VA_L2CC_BASE + L310_DATA_LATENCY_CTRL); |
Russell King | adf4b00 | 2014-03-19 12:18:02 +0000 | [diff] [blame] | 47 | l2x0_init(VA_L2CC_BASE, 0x30a00001, 0xfe0fffff); |
Viresh Kumar | e3978dc | 2012-04-19 22:23:13 +0530 | [diff] [blame] | 48 | } |
| 49 | |
| 50 | /* |
| 51 | * Following will create 16MB static virtual/physical mappings |
| 52 | * PHYSICAL VIRTUAL |
Pratyush Anand | 36c5c90 | 2013-11-29 15:57:35 +0530 | [diff] [blame] | 53 | * 0xB3000000 0xF9000000 |
Viresh Kumar | e3978dc | 2012-04-19 22:23:13 +0530 | [diff] [blame] | 54 | * 0xE0000000 0xFD000000 |
| 55 | * 0xEC000000 0xFC000000 |
| 56 | * 0xED000000 0xFB000000 |
| 57 | */ |
Sachin Kamat | 3da1d7b | 2014-06-24 17:13:53 +0530 | [diff] [blame] | 58 | static struct map_desc spear13xx_io_desc[] __initdata = { |
Viresh Kumar | e3978dc | 2012-04-19 22:23:13 +0530 | [diff] [blame] | 59 | { |
Arnd Bergmann | 009a01e | 2012-09-14 20:22:00 +0000 | [diff] [blame] | 60 | .virtual = (unsigned long)VA_PERIP_GRP2_BASE, |
Viresh Kumar | e3978dc | 2012-04-19 22:23:13 +0530 | [diff] [blame] | 61 | .pfn = __phys_to_pfn(PERIP_GRP2_BASE), |
| 62 | .length = SZ_16M, |
| 63 | .type = MT_DEVICE |
| 64 | }, { |
Arnd Bergmann | 009a01e | 2012-09-14 20:22:00 +0000 | [diff] [blame] | 65 | .virtual = (unsigned long)VA_PERIP_GRP1_BASE, |
Viresh Kumar | e3978dc | 2012-04-19 22:23:13 +0530 | [diff] [blame] | 66 | .pfn = __phys_to_pfn(PERIP_GRP1_BASE), |
| 67 | .length = SZ_16M, |
| 68 | .type = MT_DEVICE |
| 69 | }, { |
Arnd Bergmann | 009a01e | 2012-09-14 20:22:00 +0000 | [diff] [blame] | 70 | .virtual = (unsigned long)VA_A9SM_AND_MPMC_BASE, |
Viresh Kumar | e3978dc | 2012-04-19 22:23:13 +0530 | [diff] [blame] | 71 | .pfn = __phys_to_pfn(A9SM_AND_MPMC_BASE), |
| 72 | .length = SZ_16M, |
| 73 | .type = MT_DEVICE |
| 74 | }, { |
| 75 | .virtual = (unsigned long)VA_L2CC_BASE, |
| 76 | .pfn = __phys_to_pfn(L2CC_BASE), |
| 77 | .length = SZ_4K, |
| 78 | .type = MT_DEVICE |
| 79 | }, |
| 80 | }; |
| 81 | |
| 82 | /* This will create static memory mapping for selected devices */ |
| 83 | void __init spear13xx_map_io(void) |
| 84 | { |
| 85 | iotable_init(spear13xx_io_desc, ARRAY_SIZE(spear13xx_io_desc)); |
| 86 | } |
| 87 | |
| 88 | static void __init spear13xx_clk_init(void) |
| 89 | { |
| 90 | if (of_machine_is_compatible("st,spear1310")) |
Arnd Bergmann | d9909eb | 2012-12-02 17:59:57 +0100 | [diff] [blame] | 91 | spear1310_clk_init(VA_MISC_BASE, VA_SPEAR1310_RAS_BASE); |
Viresh Kumar | e3978dc | 2012-04-19 22:23:13 +0530 | [diff] [blame] | 92 | else if (of_machine_is_compatible("st,spear1340")) |
Arnd Bergmann | d9909eb | 2012-12-02 17:59:57 +0100 | [diff] [blame] | 93 | spear1340_clk_init(VA_MISC_BASE); |
Viresh Kumar | e3978dc | 2012-04-19 22:23:13 +0530 | [diff] [blame] | 94 | else |
| 95 | pr_err("%s: Unknown machine\n", __func__); |
| 96 | } |
| 97 | |
Stephen Warren | 6bb27d7 | 2012-11-08 12:40:59 -0700 | [diff] [blame] | 98 | void __init spear13xx_timer_init(void) |
Viresh Kumar | e3978dc | 2012-04-19 22:23:13 +0530 | [diff] [blame] | 99 | { |
| 100 | char pclk_name[] = "osc_24m_clk"; |
| 101 | struct clk *gpt_clk, *pclk; |
| 102 | |
| 103 | spear13xx_clk_init(); |
| 104 | |
| 105 | /* get the system timer clock */ |
| 106 | gpt_clk = clk_get_sys("gpt0", NULL); |
| 107 | if (IS_ERR(gpt_clk)) { |
| 108 | pr_err("%s:couldn't get clk for gpt\n", __func__); |
| 109 | BUG(); |
| 110 | } |
| 111 | |
| 112 | /* get the suitable parent clock for timer*/ |
| 113 | pclk = clk_get(NULL, pclk_name); |
| 114 | if (IS_ERR(pclk)) { |
| 115 | pr_err("%s:couldn't get %s as parent for gpt\n", __func__, |
| 116 | pclk_name); |
| 117 | BUG(); |
| 118 | } |
| 119 | |
| 120 | clk_set_parent(gpt_clk, pclk); |
| 121 | clk_put(gpt_clk); |
| 122 | clk_put(pclk); |
| 123 | |
| 124 | spear_setup_of_timer(); |
Daniel Lezcano | ba5d08c | 2017-05-26 17:40:46 +0200 | [diff] [blame] | 125 | timer_probe(); |
Viresh Kumar | e3978dc | 2012-04-19 22:23:13 +0530 | [diff] [blame] | 126 | } |