1. cf83a28 clk: tegra: divider: Check UART's divider enable-bit state on rate's recalculation by Dmitry Osipenko · 5 years ago
  2. d64422d clk: tegra: divider: Save and restore divider rate by Sowjanya Komatineni · 6 years ago
  3. 9952f69 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 by Thomas Gleixner · 6 years ago
  4. e71f4d3 clk: tegra: divider: Mark Memory Controller clock as read-only by Dmitry Osipenko · 6 years ago
  5. 032405a Merge branches 'clk-imx6-ocram', 'clk-missing-put', 'clk-tegra-sdmmc-jitter', 'clk-allwinner' and 'clk-uniphier' into clk-next by Stephen Boyd · 7 years ago
  6. cb3ac59 clk: tegra: Refactor fractional divider calculation by Peter De Schrijver · 7 years ago
  7. da0d223 clk: tegra: Mark Memory Controller clock as critical by Dmitry Osipenko · 7 years ago
  8. 3ed9c82 tegra/clk-divider: fix wrong do_div() usage by Nicolas Pitre · 9 years ago
  9. 584ac4e clk: tegra: Properly include clk.h by Stephen Boyd · 10 years ago
  10. 4f4f85f clk: tegra: Implement memory-controller clock by Thierry Reding · 11 years ago
  11. 3de5bdf clk: tegra: use max divider if divider overflows by Andrew Bresticker · 11 years ago
  12. 8f8f484 clk: tegra: add Tegra specific clocks by Prashant Gaikwad · 12 years ago