1. eb214f2 kasan, arm64: use ARCH_SLAB_MINALIGN instead of manual aligning by Andrey Konovalov · 6 years ago
  2. 1602df0 arm64: cpufeature: Fix handling of CTR_EL0.IDC field by Suzuki K Poulose · 6 years ago
  3. 4c4a39d arm64: Fix mismatched cache line size detection by Suzuki K Poulose · 7 years ago
  4. ebc7e21 arm64: Increase ARCH_DMA_MINALIGN to 128 by Catalin Marinas · 7 years ago
  5. d93277b Revert "arm64: Increase the max granular size" by Catalin Marinas · 7 years ago
  6. 3f251cf Revert "arm64: Revert L1_CACHE_SHIFT back to 6 (64-byte cache line size)" by Will Deacon · 7 years ago
  7. 6ae4b6e arm64: Add support for new control bits CTR_EL0.DIC and CTR_EL0.IDC by Shanker Donthineni · 7 years ago
  8. 1f85b42 arm64: Revert L1_CACHE_SHIFT back to 6 (64-byte cache line size) by Catalin Marinas · 7 years ago
  9. dda288d arm64: cache: Identify VPIPT I-caches by Will Deacon · 8 years ago
  10. 02f7760 arm64: cache: Merge cachetype.h into cache.h by Will Deacon · 8 years ago
  11. 9730348 arm64: Increase the max granular size by Tirumalesh Chalamarla · 9 years ago
  12. e4f88d8 arm64: Implement support for read-mostly sections by Jungseok Lee · 10 years ago
  13. a41dc0e arm64: Implement cache_line_size() based on CTR_EL0.CWG by Catalin Marinas · 11 years ago
  14. f1a0c4a arm64: Cache maintenance routines by Catalin Marinas · 13 years ago