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<h4 class="subsection">9.9.2 Instruction expansion</h4>

<p><a name="index-instruction-expansion_002c-CRIS-903"></a><a name="index-CRIS-instruction-expansion-904"></a><code>as</code> will silently choose an instruction that fits
the operand size for &lsquo;<samp><span class="samp">[register+constant]</span></samp>&rsquo; operands.  For
example, the offset <code>127</code> in <code>move.d [r3+127],r4</code> fits
in an instruction using a signed-byte offset.  Similarly,
<code>move.d [r2+32767],r1</code> will generate an instruction using a
16-bit offset.  For symbolic expressions and constants that do
not fit in 16 bits including the sign bit, a 32-bit offset is
generated.

   <p>For branches, <code>as</code> will expand from a 16-bit branch
instruction into a sequence of instructions that can reach a
full 32-bit address.  Since this does not correspond to a single
instruction, such expansions can optionally be warned about. 
See <a href="CRIS_002dOpts.html#CRIS_002dOpts">CRIS-Opts</a>.

   <p>If the operand is found to fit the range, a <code>lapc</code> mnemonic
will translate to a <code>lapcq</code> instruction.  Use <code>lapc.d</code>
to force the 32-bit <code>lapc</code> instruction.

   <p>Similarly, the <code>addo</code> mnemonic will translate to the
shortest fitting instruction of <code>addoq</code>, <code>addo.w</code> and
<code>addo.d</code>, when used with a operand that is a constant known
at assembly time.

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