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Up:&nbsp;<a rel="up" accesskey="u" href="M68HC11_002dopcodes.html#M68HC11_002dopcodes">M68HC11-opcodes</a>
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<h5 class="subsubsection">9.23.6.1 Branch Improvement</h5>

<p><a name="index-pseudo_002dopcodes_002c-M68HC11-1512"></a><a name="index-M68HC11-pseudo_002dopcodes-1513"></a><a name="index-branch-improvement_002c-M68HC11-1514"></a><a name="index-M68HC11-branch-improvement-1515"></a>
Certain pseudo opcodes are permitted for branch instructions. 
They expand to the shortest branch instruction that reach the
target. Generally these mnemonics are made by prepending &lsquo;<samp><span class="samp">j</span></samp>&rsquo; to
the start of Motorola mnemonic. These pseudo opcodes are not affected
by the &lsquo;<samp><span class="samp">--short-branches</span></samp>&rsquo; or &lsquo;<samp><span class="samp">--force-long-branches</span></samp>&rsquo; options.

   <p>The following table summarizes the pseudo-operations.

<pre class="smallexample">                             Displacement Width
          +-------------------------------------------------------------+
          |                     Options                                 |
          |    --short-branches           --force-long-branches         |
          +--------------------------+----------------------------------+
       Op |BYTE             WORD     | BYTE          WORD               |
          +--------------------------+----------------------------------+
      bsr | bsr &lt;pc-rel&gt;    &lt;error&gt;  |               jsr &lt;abs&gt;          |
      bra | bra &lt;pc-rel&gt;    &lt;error&gt;  |               jmp &lt;abs&gt;          |
     jbsr | bsr &lt;pc-rel&gt;   jsr &lt;abs&gt; | bsr &lt;pc-rel&gt;  jsr &lt;abs&gt;          |
     jbra | bra &lt;pc-rel&gt;   jmp &lt;abs&gt; | bra &lt;pc-rel&gt;  jmp &lt;abs&gt;          |
      bXX | bXX &lt;pc-rel&gt;    &lt;error&gt;  |               bNX +3; jmp &lt;abs&gt;  |
     jbXX | bXX &lt;pc-rel&gt;   bNX +3;   | bXX &lt;pc-rel&gt;  bNX +3; jmp &lt;abs&gt;  |
          |                jmp &lt;abs&gt; |                                  |
          +--------------------------+----------------------------------+
     XX: condition
     NX: negative of condition XX
     
</pre>
     <dl>
<dt><code>jbsr</code><dt><code>jbra</code><dd>These are the simplest jump pseudo-operations; they always map to one
particular machine instruction, depending on the displacement to the
branch target.

     <br><dt><code>jb</code><var>XX</var><dd>Here, &lsquo;<samp><span class="samp">jb</span><var>XX</var></samp>&rsquo; stands for an entire family of pseudo-operations,
where <var>XX</var> is a conditional branch or condition-code test.  The full
list of pseudo-ops in this family is:
     <pre class="smallexample">           jbcc   jbeq   jbge   jbgt   jbhi   jbvs   jbpl  jblo
           jbcs   jbne   jblt   jble   jbls   jbvc   jbmi
</pre>
     <p>For the cases of non-PC relative displacements and long displacements,
<code>as</code> issues a longer code fragment in terms of
<var>NX</var>, the opposite condition to <var>XX</var>.  For example, for the
non-PC relative case:
     <pre class="smallexample">              jb<var>XX</var> foo
</pre>
     <p>gives
     <pre class="smallexample">               b<var>NX</var>s oof
               jmp foo
           oof:
</pre>
     </dl>

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