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<h4 class="subsection">G.5.3 ARM Features</h4>

<p><a name="index-target-descriptions_002c-ARM-features-3660"></a>
The &lsquo;<samp><span class="samp">org.gnu.gdb.arm.core</span></samp>&rsquo; feature is required for non-M-profile
ARM targets. 
It should contain registers &lsquo;<samp><span class="samp">r0</span></samp>&rsquo; through &lsquo;<samp><span class="samp">r13</span></samp>&rsquo;, &lsquo;<samp><span class="samp">sp</span></samp>&rsquo;,
&lsquo;<samp><span class="samp">lr</span></samp>&rsquo;, &lsquo;<samp><span class="samp">pc</span></samp>&rsquo;, and &lsquo;<samp><span class="samp">cpsr</span></samp>&rsquo;.

   <p>For M-profile targets (e.g. Cortex-M3), the &lsquo;<samp><span class="samp">org.gnu.gdb.arm.core</span></samp>&rsquo;
feature is replaced by &lsquo;<samp><span class="samp">org.gnu.gdb.arm.m-profile</span></samp>&rsquo;.  It should contain
registers &lsquo;<samp><span class="samp">r0</span></samp>&rsquo; through &lsquo;<samp><span class="samp">r13</span></samp>&rsquo;, &lsquo;<samp><span class="samp">sp</span></samp>&rsquo;, &lsquo;<samp><span class="samp">lr</span></samp>&rsquo;, &lsquo;<samp><span class="samp">pc</span></samp>&rsquo;,
and &lsquo;<samp><span class="samp">xpsr</span></samp>&rsquo;.

   <p>The &lsquo;<samp><span class="samp">org.gnu.gdb.arm.fpa</span></samp>&rsquo; feature is optional.  If present, it
should contain registers &lsquo;<samp><span class="samp">f0</span></samp>&rsquo; through &lsquo;<samp><span class="samp">f7</span></samp>&rsquo; and &lsquo;<samp><span class="samp">fps</span></samp>&rsquo;.

   <p>The &lsquo;<samp><span class="samp">org.gnu.gdb.xscale.iwmmxt</span></samp>&rsquo; feature is optional.  If present,
it should contain at least registers &lsquo;<samp><span class="samp">wR0</span></samp>&rsquo; through &lsquo;<samp><span class="samp">wR15</span></samp>&rsquo; and
&lsquo;<samp><span class="samp">wCGR0</span></samp>&rsquo; through &lsquo;<samp><span class="samp">wCGR3</span></samp>&rsquo;.  The &lsquo;<samp><span class="samp">wCID</span></samp>&rsquo;, &lsquo;<samp><span class="samp">wCon</span></samp>&rsquo;,
&lsquo;<samp><span class="samp">wCSSF</span></samp>&rsquo;, and &lsquo;<samp><span class="samp">wCASF</span></samp>&rsquo; registers are optional.

   <p>The &lsquo;<samp><span class="samp">org.gnu.gdb.arm.vfp</span></samp>&rsquo; feature is optional.  If present, it
should contain at least registers &lsquo;<samp><span class="samp">d0</span></samp>&rsquo; through &lsquo;<samp><span class="samp">d15</span></samp>&rsquo;.  If
they are present, &lsquo;<samp><span class="samp">d16</span></samp>&rsquo; through &lsquo;<samp><span class="samp">d31</span></samp>&rsquo; should also be included. 
<span class="sc">gdb</span> will synthesize the single-precision registers from
halves of the double-precision registers.

   <p>The &lsquo;<samp><span class="samp">org.gnu.gdb.arm.neon</span></samp>&rsquo; feature is optional.  It does not
need to contain registers; it instructs <span class="sc">gdb</span> to display the
VFP double-precision registers as vectors and to synthesize the
quad-precision registers from pairs of double-precision registers. 
If this feature is present, &lsquo;<samp><span class="samp">org.gnu.gdb.arm.vfp</span></samp>&rsquo; must also
be present and include 32 double-precision registers.

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