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<title>Debugging with GDB: PowerPC Features</title>

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<a name="PowerPC-Features"></a>
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<p>
Next: <a href="S_002f390-and-System-z-Features.html#S_002f390-and-System-z-Features" accesskey="n" rel="next">S/390 and System z Features</a>, Previous: <a href="Nios-II-Features.html#Nios-II-Features" accesskey="p" rel="prev">Nios II Features</a>, Up: <a href="Standard-Target-Features.html#Standard-Target-Features" accesskey="u" rel="up">Standard Target Features</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Concept-Index.html#Concept-Index" title="Index" rel="index">Index</a>]</p>
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<a name="PowerPC-Features-1"></a>
<h4 class="subsection">G.4.8 PowerPC Features</h4>
<a name="index-target-descriptions_002c-PowerPC-features"></a>

<p>The &lsquo;<samp>org.gnu.gdb.power.core</samp>&rsquo; feature is required for PowerPC
targets.  It should contain registers &lsquo;<samp>r0</samp>&rsquo; through &lsquo;<samp>r31</samp>&rsquo;,
&lsquo;<samp>pc</samp>&rsquo;, &lsquo;<samp>msr</samp>&rsquo;, &lsquo;<samp>cr</samp>&rsquo;, &lsquo;<samp>lr</samp>&rsquo;, &lsquo;<samp>ctr</samp>&rsquo;, and
&lsquo;<samp>xer</samp>&rsquo;.  They may be 32-bit or 64-bit depending on the target.
</p>
<p>The &lsquo;<samp>org.gnu.gdb.power.fpu</samp>&rsquo; feature is optional.  It should
contain registers &lsquo;<samp>f0</samp>&rsquo; through &lsquo;<samp>f31</samp>&rsquo; and &lsquo;<samp>fpscr</samp>&rsquo;.
</p>
<p>The &lsquo;<samp>org.gnu.gdb.power.altivec</samp>&rsquo; feature is optional.  It should
contain registers &lsquo;<samp>vr0</samp>&rsquo; through &lsquo;<samp>vr31</samp>&rsquo;, &lsquo;<samp>vscr</samp>&rsquo;,
and &lsquo;<samp>vrsave</samp>&rsquo;.
</p>
<p>The &lsquo;<samp>org.gnu.gdb.power.vsx</samp>&rsquo; feature is optional.  It should
contain registers &lsquo;<samp>vs0h</samp>&rsquo; through &lsquo;<samp>vs31h</samp>&rsquo;.  <small>GDB</small>
will combine these registers with the floating point registers
(&lsquo;<samp>f0</samp>&rsquo; through &lsquo;<samp>f31</samp>&rsquo;) and the altivec registers (&lsquo;<samp>vr0</samp>&rsquo;
through &lsquo;<samp>vr31</samp>&rsquo;) to present the 128-bit wide registers &lsquo;<samp>vs0</samp>&rsquo;
through &lsquo;<samp>vs63</samp>&rsquo;, the set of vector registers for POWER7.
</p>
<p>The &lsquo;<samp>org.gnu.gdb.power.spe</samp>&rsquo; feature is optional.  It should
contain registers &lsquo;<samp>ev0h</samp>&rsquo; through &lsquo;<samp>ev31h</samp>&rsquo;, &lsquo;<samp>acc</samp>&rsquo;, and
&lsquo;<samp>spefscr</samp>&rsquo;.  SPE targets should provide 32-bit registers in
&lsquo;<samp>org.gnu.gdb.power.core</samp>&rsquo; and provide the upper halves in
&lsquo;<samp>ev0h</samp>&rsquo; through &lsquo;<samp>ev31h</samp>&rsquo;.  <small>GDB</small> will combine
these to present registers &lsquo;<samp>ev0</samp>&rsquo; through &lsquo;<samp>ev31</samp>&rsquo; to the
user.
</p>


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