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<h3 class="section">4.6 <samp><span class="command">ld</span></samp> and the MIPS family</h3>

<p><a name="index-MIPS-microMIPS-instruction-choice-selection-688"></a><a name="index-g_t_002d_002dinsn32-689"></a><a name="index-g_t_002d_002dno_002dinsn32-690"></a>The &lsquo;<samp><span class="samp">--insn32</span></samp>&rsquo; and &lsquo;<samp><span class="samp">--no-insn32</span></samp>&rsquo; options control the choice of
microMIPS instructions used in code generated by the linker, such as that
in the PLT or lazy binding stubs, or in relaxation.  If &lsquo;<samp><span class="samp">--insn32</span></samp>&rsquo; is
used, then the linker only uses 32-bit instruction encodings.  By default
or if &lsquo;<samp><span class="samp">--no-insn32</span></samp>&rsquo; is used, all instruction encodings are used,
including 16-bit ones where possible.

   <p><a name="index-MIPS-branch-relocation-check-control-691"></a><a name="index-g_t_002d_002dignore_002dbranch_002disa-692"></a><a name="index-g_t_002d_002dno_002dignore_002dbranch_002disa-693"></a>The &lsquo;<samp><span class="samp">--ignore-branch-isa</span></samp>&rsquo; and &lsquo;<samp><span class="samp">--no-ignore-branch-isa</span></samp>&rsquo; options
control branch relocation checks for invalid ISA mode transitions.  If
&lsquo;<samp><span class="samp">--ignore-branch-isa</span></samp>&rsquo; is used, then the linker accepts any branch
relocations and any ISA mode transition required is lost in relocation
calculation, except for some cases of <code>BAL</code> instructions which meet
relaxation conditions and are converted to equivalent <code>JALX</code>
instructions as the associated relocation is calculated.  By default
or if &lsquo;<samp><span class="samp">--no-ignore-branch-isa</span></samp>&rsquo; is used a check is made causing
the loss of an ISA mode transition to produce an error.

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