plat/arm: Fix misra warnings in platform code
Change-Id: Ica944acc474a099219d50b041cfaeabd4f3d362f
Signed-off-by: Sathees Balya <sathees.balya@arm.com>
diff --git a/plat/arm/common/arm_nor_psci_mem_protect.c b/plat/arm/common/arm_nor_psci_mem_protect.c
index 1b0b1da..597bc50 100644
--- a/plat/arm/common/arm_nor_psci_mem_protect.c
+++ b/plat/arm/common/arm_nor_psci_mem_protect.c
@@ -51,14 +51,14 @@
******************************************************************************/
int arm_nor_psci_write_mem_protect(int val)
{
- int enable = (val != 0) ? 1 : 0;
+ unsigned long enable = (val != 0) ? 1UL : 0UL;
if (nor_unlock(PLAT_ARM_MEM_PROT_ADDR) != 0) {
ERROR("unlocking memory protect variable\n");
return -1;
}
- if (enable == 1) {
+ if (enable == 1UL) {
/*
* If we want to write a value different than 0
* then we have to erase the full block because
diff --git a/plat/arm/common/arm_topology.c b/plat/arm/common/arm_topology.c
index c6d12da..b0ad4d1 100644
--- a/plat/arm/common/arm_topology.c
+++ b/plat/arm/common/arm_topology.c
@@ -29,12 +29,14 @@
pe_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK;
#else
valid_mask = ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK);
- cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK;
- cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK;
+ cluster_id = (unsigned int) ((mpidr >> MPIDR_AFF1_SHIFT) &
+ MPIDR_AFFLVL_MASK);
+ cpu_id = (unsigned int) ((mpidr >> MPIDR_AFF0_SHIFT) &
+ MPIDR_AFFLVL_MASK);
#endif /* ARM_PLAT_MT */
mpidr &= MPIDR_AFFINITY_MASK;
- if (mpidr & valid_mask)
+ if ((mpidr & valid_mask) != 0U)
return -1;
if (cluster_id >= PLAT_ARM_CLUSTER_COUNT)