blob: 3c00e9c73af22644bb8f8c9f69556ffdf29036d7 [file] [log] [blame]
From 2e3dd0040e676530f7e735fab335ff449b9b3f4d Mon Sep 17 00:00:00 2001
From: Lauren Post <lauren.post@freescale.com>
Date: Tue, 22 Mar 2016 22:08:25 +0100
Subject: [PATCH] Add ARM support into xf86drm.h
This provides support for Xorg interface. Without this the vivante
samples will hang during close requiring a reboot
[Adapted from yocto project]
Upstream-Status: Pending
Signed-off-by: Lauren Post <lauren.post@freescale.com>
Signed-off-by: Evan Kotara <evan.kotara@freescale.com>
[Thomas: change CAS code to only be used on ARMv6/ARMv7, and not
ARMv4/ARMv5, which don't support ldrex/strex. If no CAS implementation
is provided libdrm falls back to a system call for locking/unlocking.]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
xf86drm.h | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/xf86drm.h b/xf86drm.h
index 481d882..72341f6 100644
--- a/xf86drm.h
+++ b/xf86drm.h
@@ -469,6 +469,28 @@ do { register unsigned int __old __asm("o0"); \
: "cr0", "memory"); \
} while (0)
+# elif defined (__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) \
+ || defined (__ARM_ARCH_6Z__) || defined(__ARM_ARCH_6ZK__) \
+ || defined (__ARM_ARCH_6K__) || defined(__ARM_ARCH_6T2__) \
+ || defined (__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) \
+ || defined(__ARM_ARCH_7R__) || defined(__ARM_ARCH_7M__) \
+ || defined(__ARM_ARCH_7EM__)
+ #undef DRM_DEV_MODE
+ #define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP|S_IROTH|S_IWOTH)
+
+ #define DRM_CAS(lock,old,new,__ret) \
+ do { \
+ __asm__ __volatile__ ( \
+ "1: ldrex %0, [%1]\n" \
+ " teq %0, %2\n" \
+ " ite eq\n" \
+ " strexeq %0, %3, [%1]\n" \
+ " movne %0, #1\n" \
+ : "=&r" (__ret) \
+ : "r" (lock), "r" (old), "r" (new) \
+ : "cc","memory"); \
+ } while (0)
+
#endif /* architecture */
#endif /* __GNUC__ >= 2 */
--
2.6.4