x86: pmu: fix failures on 32-bit due to wrong masks
Some mask computation are using long constants instead of long long
constants, which causes test failures on x86-32.
Signed-off-by: Nadav Amit <namit@vmware.com>
Message-Id: <20200619193909.18949-1-namit@vmware.com>
Reviewed-by: Jim Mattson <jmattson@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
diff --git a/x86/pmu.c b/x86/pmu.c
index 91a6fb4..5a3d55b 100644
--- a/x86/pmu.c
+++ b/x86/pmu.c
@@ -324,11 +324,11 @@
cnt.count = 1 - count;
if (gp_counter_base == MSR_IA32_PMC0)
- cnt.count &= (1ul << eax.split.bit_width) - 1;
+ cnt.count &= (1ull << eax.split.bit_width) - 1;
if (i == num_counters) {
cnt.ctr = fixed_events[0].unit_sel;
- cnt.count &= (1ul << edx.split.bit_width_fixed) - 1;
+ cnt.count &= (1ull << edx.split.bit_width_fixed) - 1;
}
if (i % 2)
@@ -456,7 +456,7 @@
count = -1;
if (gp_counter_base == MSR_IA32_PMC0)
- count &= (1ul << eax.split.bit_width) - 1;
+ count &= (1ull << eax.split.bit_width) - 1;
wrmsr(gp_counter_base, count);
@@ -488,7 +488,7 @@
{
u64 val_64 = 0xffffff0123456789ull;
u64 val_32 = val_64 & ((1ull << 32) - 1);
- u64 val_max_width = val_64 & ((1ul << eax.split.bit_width) - 1);
+ u64 val_max_width = val_64 & ((1ull << eax.split.bit_width) - 1);
int i;
/*
