x86: svm: flush TLB on each test
Several svm tests change PTEs but do not flush the TLB. To avoid messing
around or encountering new bugs in the future, flush the TLB on every
test.
Signed-off-by: Nadav Amit <namit@vmware.com>
Message-Id: <20200630094516.22983-4-namit@vmware.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
diff --git a/x86/svm.c b/x86/svm.c
index f35c063..0fcad8d 100644
--- a/x86/svm.c
+++ b/x86/svm.c
@@ -170,6 +170,7 @@
if (npt_supported()) {
ctrl->nested_ctl = 1;
ctrl->nested_cr3 = (u64)pml4e;
+ ctrl->tlb_ctl = TLB_CONTROL_FLUSH_ALL_ASID;
}
}
