| if (!this_cpu_has(X86_FEATURE_TSC_ADJUST)) { |
| report_skip("MSR_IA32_TSC_ADJUST feature not enabled"); |
| report(rdmsr(MSR_IA32_TSC_ADJUST) == 0x0, |
| "MSR_IA32_TSC_ADJUST msr initialization"); |
| wrmsr(MSR_IA32_TSC_ADJUST, t3); |
| report(rdmsr(MSR_IA32_TSC_ADJUST) == t3, |
| "MSR_IA32_TSC_ADJUST msr read / write"); |
| "TSC adjustment for MSR_IA32_TSC_ADJUST value"); |
| wrmsr(MSR_IA32_TSC_ADJUST, t3); |
| report(rdmsr(MSR_IA32_TSC_ADJUST) == t3, |
| "MSR_IA32_TSC_ADJUST msr read / write"); |
| t5 = rdmsr(MSR_IA32_TSC_ADJUST); |
| report(t1 <= t4 - t5, "Internal TSC advances across write to IA32_TSC"); |
| report(t2 >= t4, "IA32_TSC advances after write to IA32_TSC"); |