arch/mips/boot/dts/loongson/loongson64g-package.dtsi

// SPDX-License-Identifier: GPL-2.0

#include <dt-bindings/interrupt-controller/irq.h>

/ {
	#address-cells = <2>;
	#size-cells = <2>;

	cpuintc: interrupt-controller {
		#address-cells = <0>;
		#interrupt-cells = <1>;
		interrupt-controller;
		compatible = "mti,cpu-interrupt-controller";
	};

	package0: bus@1fe00000 {
		compatible = "simple-bus";
		#address-cells = <2>;
		#size-cells = <1>;
		ranges = <0 0x1fe00000 0 0x1fe00000 0x100000
			0 0x3ff00000 0 0x3ff00000 0x100000
			0xefd 0xfb000000 0xefd 0xfb000000 0x10000000>;

		liointc: interrupt-controller@3ff01400 {
			compatible = "loongson,liointc-1.0";
			reg = <0 0x3ff01400 0x64>;

			interrupt-controller;
			#interrupt-cells = <2>;

			interrupt-parent = <&cpuintc>;
			interrupts = <2>, <3>;
			interrupt-names = "int0", "int1";

			loongson,parent_int_map = <0x00ffffff>, /* int0 */
						<0xff000000>, /* int1 */
						<0x00000000>, /* int2 */
						<0x00000000>; /* int3 */

		};

		cpu_uart0: serial@1fe00100 {
			compatible = "ns16550a";
			reg = <0 0x1fe00100 0x10>;
			clock-frequency = <100000000>;
			interrupt-parent = <&liointc>;
			interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
			no-loopback-test;
		};

		cpu_uart1: serial@1fe00110 {
			status = "disabled";
			compatible = "ns16550a";
			reg = <0 0x1fe00110 0x10>;
			clock-frequency = <100000000>;
			interrupts = <15 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-parent = <&liointc>;
			no-loopback-test;
		};
	};
};