| /* |
| * Copyright 2017 Gateworks Corporation |
| * |
| * This file is dual-licensed: you can use it either under the terms |
| * of the GPL or the X11 license, at your option. Note that this dual |
| * licensing only applies to this file, and not this project as a |
| * whole. |
| * |
| * a) This file is free software; you can redistribute it and/or |
| * modify it under the terms of the GNU General Public License as |
| * published by the Free Software Foundation; either version 2 of |
| * the License, or (at your option) any later version. |
| * |
| * This file is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| * |
| * You should have received a copy of the GNU General Public |
| * License along with this file; if not, write to the Free |
| * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, |
| * MA 02110-1301 USA |
| * |
| * Or, alternatively, |
| * |
| * b) Permission is hereby granted, free of charge, to any person |
| * obtaining a copy of this software and associated documentation |
| * files (the "Software"), to deal in the Software without |
| * restriction, including without limitation the rights to use, |
| * copy, modify, merge, publish, distribute, sublicense, and/or |
| * sell copies of the Software, and to permit persons to whom the |
| * Software is furnished to do so, subject to the following |
| * conditions: |
| * |
| * The above copyright notice and this permission notice shall be |
| * included in all copies or substantial portions of the Software. |
| * |
| * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
| * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
| * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
| * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| * OTHER DEALINGS IN THE SOFTWARE. |
| */ |
| |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/input/linux-event-codes.h> |
| #include <dt-bindings/interrupt-controller/irq.h> |
| |
| / { |
| chosen { |
| stdout-path = &uart2; |
| }; |
| |
| backlight { |
| compatible = "pwm-backlight"; |
| pwms = <&pwm1 0 5000000>; |
| brightness-levels = < |
| 0 1 2 3 4 5 6 7 8 9 |
| 10 11 12 13 14 15 16 17 18 19 |
| 20 21 22 23 24 25 26 27 28 29 |
| 30 31 32 33 34 35 36 37 38 39 |
| 40 41 42 43 44 45 46 47 48 49 |
| 50 51 52 53 54 55 56 57 58 59 |
| 60 61 62 63 64 65 66 67 68 69 |
| 70 71 72 73 74 75 76 77 78 79 |
| 80 81 82 83 84 85 86 87 88 89 |
| 90 91 92 93 94 95 96 97 98 99 |
| 100 |
| >; |
| default-brightness-level = <100>; |
| }; |
| |
| gpio-keys { |
| compatible = "gpio-keys"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| user-pb { |
| label = "user_pb"; |
| gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>; |
| linux,code = <BTN_0>; |
| }; |
| |
| user-pb1x { |
| label = "user_pb1x"; |
| linux,code = <BTN_1>; |
| interrupt-parent = <&gsc>; |
| interrupts = <0>; |
| }; |
| |
| key-erased { |
| label = "key-erased"; |
| linux,code = <BTN_2>; |
| interrupt-parent = <&gsc>; |
| interrupts = <1>; |
| }; |
| |
| eeprom-wp { |
| label = "eeprom_wp"; |
| linux,code = <BTN_3>; |
| interrupt-parent = <&gsc>; |
| interrupts = <2>; |
| }; |
| |
| tamper { |
| label = "tamper"; |
| linux,code = <BTN_4>; |
| interrupt-parent = <&gsc>; |
| interrupts = <5>; |
| }; |
| |
| switch-hold { |
| label = "switch_hold"; |
| linux,code = <BTN_5>; |
| interrupt-parent = <&gsc>; |
| interrupts = <7>; |
| }; |
| }; |
| |
| leds { |
| compatible = "gpio-leds"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_gpio_leds>; |
| |
| led0: user1 { |
| label = "user1"; |
| gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ |
| default-state = "off"; |
| }; |
| }; |
| |
| memory@10000000 { |
| device_type = "memory"; |
| reg = <0x10000000 0x40000000>; |
| }; |
| |
| reg_5p0v: regulator-5p0v { |
| compatible = "regulator-fixed"; |
| regulator-name = "5P0V"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| regulator-always-on; |
| }; |
| |
| reg_3p3v: regulator-3p3v { |
| compatible = "regulator-fixed"; |
| regulator-name = "3P3V"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| |
| reg_2p5v: regulator-2p5v { |
| compatible = "regulator-fixed"; |
| regulator-name = "2P5V"; |
| regulator-min-microvolt = <2500000>; |
| regulator-max-microvolt = <2500000>; |
| regulator-always-on; |
| }; |
| |
| reg_usb_h1_vbus: regulator-usb-h1-vbus { |
| compatible = "regulator-fixed"; |
| regulator-name = "usb_h1_vbus"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| gpio = <&gpio3 30 0>; |
| enable-active-high; |
| }; |
| |
| reg_usb_otg_vbus: regulator-usb-otg-vbus { |
| compatible = "regulator-fixed"; |
| regulator-name = "usb_otg_vbus"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| }; |
| |
| reg_12p0: regulator-12p0v { |
| compatible = "regulator-fixed"; |
| regulator-name = "12P0V"; |
| regulator-min-microvolt = <12000000>; |
| regulator-max-microvolt = <12000000>; |
| gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| }; |
| |
| sound { |
| compatible = "fsl,imx-audio-tlv320"; |
| model = "imx-tlv320"; |
| ssi-controller = <&ssi1>; |
| audio-codec = <&tlv320aic3105>; |
| /* routing of sink, source */ |
| audio-routing = |
| /* TLV320 LINE1L pin <-> Mic Jack connector */ |
| "LINE1L", "Mic Jack", |
| /* board Headphone Jack <-> HPOUT */ |
| "Headphone Jack", "HPLOUT", |
| "Headphone Jack", "HPROUT", |
| "Mic Jack", "Mic Bias"; |
| mux-int-port = <1>; |
| mux-ext-port = <6>; |
| }; |
| }; |
| |
| &audmux { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_audmux>; |
| status = "okay"; |
| }; |
| |
| &clks { |
| assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, |
| <&clks IMX6QDL_CLK_LDB_DI1_SEL>; |
| assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, |
| <&clks IMX6QDL_CLK_PLL3_USB_OTG>; |
| }; |
| |
| &fec { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_enet>; |
| phy-mode = "rgmii-id"; |
| status = "okay"; |
| }; |
| |
| &i2c1 { |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c1>; |
| status = "okay"; |
| |
| gsc: gsc@20 { |
| compatible = "gw,gsc"; |
| reg = <0x20>; |
| interrupt-parent = <&gpio1>; |
| interrupts = <4 IRQ_TYPE_LEVEL_LOW>; |
| interrupt-controller; |
| #interrupt-cells = <1>; |
| #size-cells = <0>; |
| |
| adc { |
| compatible = "gw,gsc-adc"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| channel@0 { |
| gw,mode = <0>; |
| reg = <0x00>; |
| label = "temp"; |
| }; |
| |
| channel@2 { |
| gw,mode = <1>; |
| reg = <0x02>; |
| label = "vdd_vin"; |
| }; |
| |
| channel@5 { |
| gw,mode = <1>; |
| reg = <0x05>; |
| label = "vdd_3p3"; |
| }; |
| |
| channel@8 { |
| gw,mode = <1>; |
| reg = <0x08>; |
| label = "vdd_bat"; |
| }; |
| |
| channel@b { |
| gw,mode = <1>; |
| reg = <0x0b>; |
| label = "vdd_5p0"; |
| }; |
| |
| channel@e { |
| gw,mode = <1>; |
| reg = <0xe>; |
| label = "vdd_arm"; |
| }; |
| |
| channel@11 { |
| gw,mode = <1>; |
| reg = <0x11>; |
| label = "vdd_soc"; |
| }; |
| |
| channel@14 { |
| gw,mode = <1>; |
| reg = <0x14>; |
| label = "vdd_3p0"; |
| }; |
| |
| channel@17 { |
| gw,mode = <1>; |
| reg = <0x17>; |
| label = "vdd_1p5"; |
| }; |
| |
| channel@1d { |
| gw,mode = <1>; |
| reg = <0x1d>; |
| label = "vdd_1p8"; |
| }; |
| |
| channel@20 { |
| gw,mode = <1>; |
| reg = <0x20>; |
| label = "vdd_an1"; |
| }; |
| |
| channel@23 { |
| gw,mode = <1>; |
| reg = <0x23>; |
| label = "vdd_2p5"; |
| }; |
| }; |
| }; |
| |
| gsc_gpio: gpio@23 { |
| compatible = "nxp,pca9555"; |
| reg = <0x23>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-parent = <&gsc>; |
| interrupts = <4>; |
| }; |
| |
| eeprom1: eeprom@50 { |
| compatible = "atmel,24c02"; |
| reg = <0x50>; |
| pagesize = <16>; |
| }; |
| |
| eeprom2: eeprom@51 { |
| compatible = "atmel,24c02"; |
| reg = <0x51>; |
| pagesize = <16>; |
| }; |
| |
| eeprom3: eeprom@52 { |
| compatible = "atmel,24c02"; |
| reg = <0x52>; |
| pagesize = <16>; |
| }; |
| |
| eeprom4: eeprom@53 { |
| compatible = "atmel,24c02"; |
| reg = <0x53>; |
| pagesize = <16>; |
| }; |
| |
| dts1672: rtc@68 { |
| compatible = "dallas,ds1672"; |
| reg = <0x68>; |
| }; |
| }; |
| |
| &i2c2 { |
| clock-frequency = <400000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c2>; |
| status = "okay"; |
| |
| ltc3676: pmic@3c { |
| compatible = "lltc,ltc3676"; |
| reg = <0x3c>; |
| interrupt-parent = <&gpio1>; |
| interrupts = <8 IRQ_TYPE_EDGE_FALLING>; |
| |
| regulators { |
| /* VDD_1P8 (1+R1/R2 = 2.505): Aud/eMMC/microSD/Touch */ |
| reg_1p8v: sw1 { |
| regulator-name = "vdd1p8"; |
| regulator-min-microvolt = <1033310>; |
| regulator-max-microvolt = <2004000>; |
| lltc,fb-voltage-divider = <301000 200000>; |
| regulator-ramp-delay = <7000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| /* VDD_DDR (1+R1/R2 = 2.105) */ |
| reg_vdd_ddr: sw2 { |
| regulator-name = "vddddr"; |
| regulator-min-microvolt = <868310>; |
| regulator-max-microvolt = <1684000>; |
| lltc,fb-voltage-divider = <221000 200000>; |
| regulator-ramp-delay = <7000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| /* VDD_ARM (1+R1/R2 = 1.635) */ |
| reg_vdd_arm: sw3 { |
| regulator-name = "vddarm"; |
| regulator-min-microvolt = <674400>; |
| regulator-max-microvolt = <1308000>; |
| lltc,fb-voltage-divider = <127000 200000>; |
| regulator-ramp-delay = <7000>; |
| regulator-boot-on; |
| regulator-always-on; |
| linux,phandle = <®_vdd_arm>; |
| }; |
| |
| /* VDD_SOC (1+R1/R2 = 1.635) */ |
| reg_vdd_soc: sw4 { |
| regulator-name = "vddsoc"; |
| regulator-min-microvolt = <674400>; |
| regulator-max-microvolt = <1308000>; |
| lltc,fb-voltage-divider = <127000 200000>; |
| regulator-ramp-delay = <7000>; |
| regulator-boot-on; |
| regulator-always-on; |
| linux,phandle = <®_vdd_soc>; |
| }; |
| |
| /* VDD_1P0 (1+R1/R2 = 1.38): */ |
| reg_1p0v: ldo2 { |
| regulator-name = "vdd1p0"; |
| regulator-min-microvolt = <1002777>; |
| regulator-max-microvolt = <1002777>; |
| lltc,fb-voltage-divider = <100000 261000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| /* VDD_HIGH (1+R1/R2 = 4.17) */ |
| reg_3p0v: ldo4 { |
| regulator-name = "vdd3p0"; |
| regulator-min-microvolt = <3023250>; |
| regulator-max-microvolt = <3023250>; |
| lltc,fb-voltage-divider = <634000 200000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| }; |
| }; |
| }; |
| |
| &i2c3 { |
| clock-frequency = <400000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c3>; |
| status = "okay"; |
| |
| tlv320aic3105: codec@18 { |
| compatible = "ti,tlv320aic3x"; |
| reg = <0x18>; |
| reset-gpios = <&gpio5 17 GPIO_ACTIVE_LOW>; |
| clocks = <&clks IMX6QDL_CLK_CKO>; |
| ai3x-micbias-vg = <2>; /* MICBIAS_2_5V */ |
| /* Regulators */ |
| DRVDD-supply = <®_3p3v>; |
| AVDD-supply = <®_3p3v>; |
| IOVDD-supply = <®_3p3v>; |
| DVDD-supply = <®_1p8v>; |
| }; |
| |
| accelerometer@1d { |
| compatible = "fsl,mma8451"; |
| reg = <0x1d>; |
| interrupt-parent = <&gpio7>; |
| interrupts = <11 IRQ_TYPE_EDGE_RISING>; |
| interrupt-names = "INT2"; |
| }; |
| |
| /* headphone detect */ |
| ts3a227e@3b { |
| compatible = "ti,ts3a227e"; |
| reg = <0x3b>; |
| interrupt-parent = <&gpio5>; |
| interrupts = <15 IRQ_TYPE_LEVEL_LOW>; |
| ti,micbias = <4>; /* 2.5V micbias */ |
| }; |
| }; |
| |
| &ldb { |
| status = "okay"; |
| |
| lvds-channel@0 { |
| fsl,data-mapping = "spwg"; |
| fsl,data-width = <18>; |
| status = "okay"; |
| |
| display-timings { |
| native-mode = <&timing0>; |
| timing0: g101evn010 { |
| clock-frequency = <68930000>; |
| hactive = <1280>; |
| vactive = <800>; |
| hback-porch = <220>; |
| hfront-porch = <40>; |
| vback-porch = <21>; |
| vfront-porch = <7>; |
| hsync-len = <60>; |
| vsync-len = <10>; |
| }; |
| }; |
| }; |
| }; |
| |
| &pwm1 { |
| #pwm-cells = <2>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_pwm1>; |
| status = "okay"; |
| }; |
| |
| &ssi1 { |
| status = "okay"; |
| }; |
| |
| &uart1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart1>; |
| status = "okay"; |
| }; |
| |
| &uart2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart2>; |
| status = "okay"; |
| }; |
| |
| &usbotg { |
| vbus-supply = <®_usb_otg_vbus>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usbotg>; |
| disable-over-current; |
| status = "okay"; |
| }; |
| |
| &usbh1 { |
| vbus-supply = <®_usb_h1_vbus>; |
| status = "okay"; |
| }; |
| |
| &usdhc1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usdhc1_200mhz>; |
| vmmc-supply = <®_3p3v>; |
| non-removable; |
| bus-width = <4>; |
| status = "okay"; |
| }; |
| |
| &usdhc2 { |
| pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
| pinctrl-0 = <&pinctrl_usdhc2>; |
| pinctrl-1 = <&pinctrl_usdhc2_100mhz>; |
| pinctrl-2 = <&pinctrl_usdhc2_200mhz>; |
| cd-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; |
| vmmc-supply = <®_3p3v>; |
| max-frequency = <100000000>; |
| status = "okay"; |
| }; |
| |
| &usdhc3 { |
| pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
| pinctrl-0 = <&pinctrl_usdhc3>; |
| pinctrl-1 = <&pinctrl_usdhc3_100mhz>; |
| pinctrl-2 = <&pinctrl_usdhc3_200mhz>; |
| non-removable; |
| vmmc-supply = <®_3p3v>; |
| keep-power-in-suspend; |
| status = "okay"; |
| }; |
| |
| &wdog1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_wdog>; |
| fsl,ext-reset-output; |
| }; |
| |
| &iomuxc { |
| pinctrl_audmux: audmuxgrp { |
| fsl,pins = < |
| MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x130b0 |
| MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x130b0 |
| MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x130b0 |
| MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x130b0 |
| MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* MCK */ |
| >; |
| }; |
| |
| pinctrl_enet: enetgrp { |
| fsl,pins = < |
| MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
| MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
| MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
| MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
| MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
| MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
| MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
| MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
| MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
| MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
| MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
| MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
| MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
| MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
| MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
| MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x4001b0b0 /* PHY_RST# */ |
| MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x4001b0b0 /* PHY_EN */ |
| >; |
| }; |
| |
| pinctrl_gpio_leds: gpioledsgrp { |
| fsl,pins = < |
| MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0 |
| >; |
| }; |
| |
| pinctrl_i2c1: i2c1grp { |
| fsl,pins = < |
| MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 |
| MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 |
| MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 /* GSC_IRQ# */ |
| >; |
| }; |
| |
| pinctrl_i2c2: i2c2grp { |
| fsl,pins = < |
| MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 |
| MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 |
| MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */ |
| >; |
| }; |
| |
| pinctrl_i2c3: i2c3grp { |
| fsl,pins = < |
| /* I2C3 */ |
| MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 |
| MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 |
| |
| /* Headphone Detect */ |
| MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x0001b0b0 /* HPDET_IRQ# */ |
| MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x0001b0b0 /* HPDET_MIC# */ |
| |
| /* Codec */ |
| MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x0001b0b0 /* CODEC_RST# */ |
| |
| /* Touch Controller */ |
| MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x0001b0b0 /* TOUCH_IRQ# */ |
| MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x0001b0b0 /* TOUCH_RST */ |
| |
| /* Stow Sensor */ |
| MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x0001b0b0 /* ACCEL_IRQ2 */ |
| MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x0001b0b0 /* ACCEL_IRQ1 */ |
| >; |
| }; |
| |
| pinctrl_pwm1: pwm1grp { |
| fsl,pins = < |
| MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_uart1: uart1grp { |
| fsl,pins = < |
| MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 |
| MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 |
| MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30 0x1b0b1 /* TXEN */ |
| >; |
| }; |
| |
| pinctrl_uart2: uart2grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 |
| MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 |
| >; |
| }; |
| |
| pinctrl_usbotg: usbotggrp { |
| fsl,pins = < |
| MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059 |
| MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x4001b0b0 /* PWR_EN */ |
| MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 /* OC */ |
| >; |
| }; |
| |
| pinctrl_usdhc1_200mhz: usdhc1grp200mhz { |
| fsl,pins = < |
| MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x4001b0b0 /* EMMY_EN */ |
| MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x4001b0b0 /* EMMY_CFG1# */ |
| MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x4001b0b0 /* EMMY_CFG2# */ |
| MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x0001b0b0 /* EMMY_BTWAKE# */ |
| MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x0001b0b0 /* EMMY_WFWAKE# */ |
| |
| MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9 |
| MX6QDL_PAD_SD1_CMD__SD1_CMD 0x100f9 |
| MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9 |
| MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9 |
| MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9 |
| MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9 |
| >; |
| }; |
| |
| pinctrl_usdhc2: usdhc2grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 |
| MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 |
| MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 |
| MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 |
| MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 |
| MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 |
| MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x17059 /* CD */ |
| MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x17059 |
| >; |
| }; |
| |
| pinctrl_usdhc2_100mhz: usdhc2grp100mhz { |
| fsl,pins = < |
| MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9 |
| MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9 |
| MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9 |
| MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9 |
| MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9 |
| MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9 |
| MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x170b9 /* CD */ |
| MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x170b9 |
| >; |
| }; |
| |
| pinctrl_usdhc2_200mhz: usdhc2grp200mhz { |
| fsl,pins = < |
| MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9 |
| MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9 |
| MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9 |
| MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9 |
| MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9 |
| MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9 |
| MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x170f9 /* CD */ |
| MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x170f9 |
| >; |
| }; |
| |
| pinctrl_usdhc3: usdhc3grp { |
| fsl,pins = < |
| MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 |
| MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 |
| MX6QDL_PAD_SD3_RST__SD3_RESET 0x10059 |
| MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 |
| MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 |
| MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 |
| MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 |
| MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 |
| MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 |
| MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 |
| MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 |
| >; |
| }; |
| |
| pinctrl_usdhc3_100mhz: usdhc3grp100mhz { |
| fsl,pins = < |
| MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9 |
| MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9 |
| MX6QDL_PAD_SD3_RST__SD3_RESET 0x100b9 |
| MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 |
| MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 |
| MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 |
| MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 |
| MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170b9 |
| MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170b9 |
| MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170b9 |
| MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170b9 |
| >; |
| }; |
| |
| pinctrl_usdhc3_200mhz: usdhc3grp200mhz { |
| fsl,pins = < |
| MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9 |
| MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9 |
| MX6QDL_PAD_SD3_RST__SD3_RESET 0x100f9 |
| MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 |
| MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 |
| MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 |
| MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 |
| MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170f9 |
| MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170f9 |
| MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170f9 |
| MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170f9 |
| >; |
| }; |
| |
| pinctrl_wdog: wdoggrp { |
| fsl,pins = < |
| MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 |
| >; |
| }; |
| }; |
