| // SPDX-License-Identifier: BSD-3-Clause |
| /* |
| * Copyright (c) 2021, The Linux Foundation. All rights reserved. |
| * Copyright (c) 2022, Linaro Limited |
| */ |
| |
| /dts-v1/; |
| |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/regulator/qcom,rpmh-regulator.h> |
| #include <dt-bindings/spmi/spmi.h> |
| |
| #include "sa8540p.dtsi" |
| #include "sa8540p-pmics.dtsi" |
| |
| / { |
| model = "Qualcomm SA8295P ADP"; |
| compatible = "qcom,sa8295p-adp", "qcom,sa8540p"; |
| |
| aliases { |
| serial0 = &uart17; |
| }; |
| |
| chosen { |
| stdout-path = "serial0:115200n8"; |
| }; |
| |
| dp2-connector { |
| compatible = "dp-connector"; |
| label = "DP2"; |
| type = "mini"; |
| |
| hpd-gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>; |
| |
| port { |
| dp2_connector_in: endpoint { |
| remote-endpoint = <&mdss1_dp0_phy_out>; |
| }; |
| }; |
| }; |
| |
| dp3-connector { |
| compatible = "dp-connector"; |
| label = "DP3"; |
| type = "mini"; |
| |
| hpd-gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>; |
| |
| port { |
| dp3_connector_in: endpoint { |
| remote-endpoint = <&mdss1_dp1_phy_out>; |
| }; |
| }; |
| }; |
| |
| edp0-connector { |
| compatible = "dp-connector"; |
| label = "EDP0"; |
| type = "mini"; |
| |
| hpd-gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; |
| |
| port { |
| edp0_connector_in: endpoint { |
| remote-endpoint = <&mdss0_dp2_phy_out>; |
| }; |
| }; |
| }; |
| |
| edp1-connector { |
| compatible = "dp-connector"; |
| label = "EDP1"; |
| type = "mini"; |
| |
| hpd-gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; |
| |
| port { |
| edp1_connector_in: endpoint { |
| remote-endpoint = <&mdss0_dp3_phy_out>; |
| }; |
| }; |
| }; |
| |
| edp2-connector { |
| compatible = "dp-connector"; |
| label = "EDP2"; |
| type = "mini"; |
| |
| hpd-gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>; |
| |
| port { |
| edp2_connector_in: endpoint { |
| remote-endpoint = <&mdss1_dp2_phy_out>; |
| }; |
| }; |
| }; |
| |
| edp3-connector { |
| compatible = "dp-connector"; |
| label = "EDP3"; |
| type = "mini"; |
| |
| hpd-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>; |
| |
| port { |
| edp3_connector_in: endpoint { |
| remote-endpoint = <&mdss1_dp3_phy_out>; |
| }; |
| }; |
| }; |
| }; |
| |
| &apps_rsc { |
| regulators-0 { |
| compatible = "qcom,pm8150-rpmh-regulators"; |
| qcom,pmic-id = "a"; |
| |
| vreg_l3a: ldo3 { |
| regulator-name = "vreg_l3a"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1208000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l5a: ldo5 { |
| regulator-name = "vreg_l5a"; |
| regulator-min-microvolt = <912000>; |
| regulator-max-microvolt = <912000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l7a: ldo7 { |
| regulator-name = "vreg_l7a"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l13a: ldo13 { |
| regulator-name = "vreg_l13a"; |
| regulator-min-microvolt = <3072000>; |
| regulator-max-microvolt = <3072000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l11a: ldo11 { |
| regulator-name = "vreg_l11a"; |
| regulator-min-microvolt = <880000>; |
| regulator-max-microvolt = <880000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| }; |
| |
| regulators-1 { |
| compatible = "qcom,pm8150-rpmh-regulators"; |
| qcom,pmic-id = "c"; |
| |
| vreg_l1c: ldo1 { |
| regulator-name = "vreg_l1c"; |
| regulator-min-microvolt = <912000>; |
| regulator-max-microvolt = <912000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l2c: ldo2 { |
| regulator-name = "vreg_l2c"; |
| regulator-min-microvolt = <3072000>; |
| regulator-max-microvolt = <3072000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l3c: ldo3 { |
| regulator-name = "vreg_l3c"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| regulator-allow-set-load; |
| regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM |
| RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l4c: ldo4 { |
| regulator-name = "vreg_l4c"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1208000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l6c: ldo6 { |
| regulator-name = "vreg_l6c"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| regulator-allow-set-load; |
| regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM |
| RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l7c: ldo7 { |
| regulator-name = "vreg_l7c"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l10c: ldo10 { |
| regulator-name = "vreg_l10c"; |
| regulator-min-microvolt = <2504000>; |
| regulator-max-microvolt = <2504000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| regulator-allow-set-load; |
| regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM |
| RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l17c: ldo17 { |
| regulator-name = "vreg_l17c"; |
| regulator-min-microvolt = <2504000>; |
| regulator-max-microvolt = <2504000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| regulator-allow-set-load; |
| regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM |
| RPMH_REGULATOR_MODE_HPM>; |
| }; |
| }; |
| |
| regulators-2 { |
| compatible = "qcom,pm8150-rpmh-regulators"; |
| qcom,pmic-id = "g"; |
| |
| vreg_l3g: ldo3 { |
| regulator-name = "vreg_l3g"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l7g: ldo7 { |
| regulator-name = "vreg_l7g"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l8g: ldo8 { |
| regulator-name = "vreg_l8g"; |
| regulator-min-microvolt = <912000>; |
| regulator-max-microvolt = <912000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l11g: ldo11 { |
| regulator-name = "vreg_l11g"; |
| regulator-min-microvolt = <912000>; |
| regulator-max-microvolt = <912000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| }; |
| }; |
| |
| &dispcc0 { |
| status = "okay"; |
| }; |
| |
| &dispcc1 { |
| status = "okay"; |
| }; |
| |
| &mdss0 { |
| status = "okay"; |
| }; |
| |
| &mdss0_dp2 { |
| data-lanes = <0 1 2 3>; |
| |
| status = "okay"; |
| |
| ports { |
| port@1 { |
| reg = <1>; |
| mdss0_dp2_phy_out: endpoint { |
| remote-endpoint = <&edp0_connector_in>; |
| }; |
| }; |
| }; |
| }; |
| |
| &mdss0_dp2_phy { |
| vdda-phy-supply = <&vreg_l8g>; |
| vdda-pll-supply = <&vreg_l3g>; |
| |
| status = "okay"; |
| }; |
| |
| &mdss0_dp3 { |
| data-lanes = <0 1 2 3>; |
| |
| status = "okay"; |
| |
| ports { |
| port@1 { |
| reg = <1>; |
| mdss0_dp3_phy_out: endpoint { |
| remote-endpoint = <&edp1_connector_in>; |
| }; |
| }; |
| }; |
| }; |
| |
| &mdss0_dp3_phy { |
| vdda-phy-supply = <&vreg_l8g>; |
| vdda-pll-supply = <&vreg_l3g>; |
| |
| status = "okay"; |
| }; |
| |
| &mdss1 { |
| status = "okay"; |
| }; |
| |
| &mdss1_dp0 { |
| data-lanes = <0 1 2 3>; |
| |
| status = "okay"; |
| |
| ports { |
| port@1 { |
| reg = <1>; |
| mdss1_dp0_phy_out: endpoint { |
| remote-endpoint = <&dp2_connector_in>; |
| }; |
| }; |
| }; |
| }; |
| |
| &mdss1_dp0_phy { |
| vdda-phy-supply = <&vreg_l11g>; |
| vdda-pll-supply = <&vreg_l3g>; |
| |
| status = "okay"; |
| }; |
| |
| &mdss1_dp1 { |
| data-lanes = <0 1 2 3>; |
| |
| status = "okay"; |
| |
| ports { |
| port@1 { |
| reg = <1>; |
| mdss1_dp1_phy_out: endpoint { |
| remote-endpoint = <&dp3_connector_in>; |
| }; |
| }; |
| }; |
| }; |
| |
| &mdss1_dp1_phy { |
| vdda-phy-supply = <&vreg_l11g>; |
| vdda-pll-supply = <&vreg_l3g>; |
| |
| status = "okay"; |
| }; |
| |
| &mdss1_dp2 { |
| data-lanes = <0 1 2 3>; |
| |
| status = "okay"; |
| |
| ports { |
| port@1 { |
| reg = <1>; |
| mdss1_dp2_phy_out: endpoint { |
| remote-endpoint = <&edp2_connector_in>; |
| }; |
| }; |
| }; |
| }; |
| |
| &mdss1_dp2_phy { |
| vdda-phy-supply = <&vreg_l11g>; |
| vdda-pll-supply = <&vreg_l3g>; |
| |
| status = "okay"; |
| }; |
| |
| &mdss1_dp3 { |
| data-lanes = <0 1 2 3>; |
| |
| status = "okay"; |
| |
| ports { |
| port@1 { |
| reg = <1>; |
| mdss1_dp3_phy_out: endpoint { |
| remote-endpoint = <&edp3_connector_in>; |
| }; |
| }; |
| }; |
| }; |
| |
| &mdss1_dp3_phy { |
| vdda-phy-supply = <&vreg_l11g>; |
| vdda-pll-supply = <&vreg_l3g>; |
| |
| status = "okay"; |
| }; |
| |
| &pcie2a { |
| perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>; |
| wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pcie2a_default>; |
| |
| status = "okay"; |
| }; |
| |
| &pcie2a_phy { |
| vdda-phy-supply = <&vreg_l11a>; |
| vdda-pll-supply = <&vreg_l3a>; |
| |
| status = "okay"; |
| }; |
| |
| &pcie3a { |
| num-lanes = <2>; |
| |
| perst-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>; |
| wake-gpios = <&tlmm 56 GPIO_ACTIVE_LOW>; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pcie3a_default>; |
| |
| status = "okay"; |
| }; |
| |
| &pcie3a_phy { |
| vdda-phy-supply = <&vreg_l11a>; |
| vdda-pll-supply = <&vreg_l3a>; |
| |
| status = "okay"; |
| }; |
| |
| &pcie3b { |
| perst-gpios = <&tlmm 153 GPIO_ACTIVE_LOW>; |
| wake-gpios = <&tlmm 130 GPIO_ACTIVE_LOW>; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pcie3b_default>; |
| |
| status = "okay"; |
| }; |
| |
| &pcie3b_phy { |
| vdda-phy-supply = <&vreg_l11a>; |
| vdda-pll-supply = <&vreg_l3a>; |
| |
| status = "okay"; |
| }; |
| |
| &pcie4 { |
| perst-gpios = <&tlmm 141 GPIO_ACTIVE_LOW>; |
| wake-gpios = <&tlmm 139 GPIO_ACTIVE_LOW>; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pcie4_default>; |
| |
| status = "okay"; |
| }; |
| |
| &pcie4_phy { |
| vdda-phy-supply = <&vreg_l11a>; |
| vdda-pll-supply = <&vreg_l3a>; |
| |
| status = "okay"; |
| }; |
| |
| &qup2 { |
| status = "okay"; |
| }; |
| |
| &remoteproc_adsp { |
| firmware-name = "qcom/sa8540p/adsp.mbn"; |
| status = "okay"; |
| }; |
| |
| &remoteproc_nsp0 { |
| firmware-name = "qcom/sa8540p/cdsp.mbn"; |
| status = "okay"; |
| }; |
| |
| &remoteproc_nsp1 { |
| firmware-name = "qcom/sa8540p/cdsp1.mbn"; |
| status = "okay"; |
| }; |
| |
| &uart17 { |
| compatible = "qcom,geni-debug-uart"; |
| status = "okay"; |
| }; |
| |
| &ufs_mem_hc { |
| reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>; |
| |
| vcc-supply = <&vreg_l17c>; |
| vcc-max-microamp = <800000>; |
| vccq-supply = <&vreg_l6c>; |
| vccq-max-microamp = <900000>; |
| |
| status = "okay"; |
| }; |
| |
| &ufs_mem_phy { |
| vdda-phy-supply = <&vreg_l8g>; |
| vdda-pll-supply = <&vreg_l3g>; |
| |
| status = "okay"; |
| }; |
| |
| &ufs_card_hc { |
| reset-gpios = <&tlmm 229 GPIO_ACTIVE_LOW>; |
| |
| vcc-supply = <&vreg_l10c>; |
| vcc-max-microamp = <800000>; |
| vccq-supply = <&vreg_l3c>; |
| vccq-max-microamp = <900000>; |
| |
| status = "okay"; |
| }; |
| |
| &ufs_card_phy { |
| vdda-phy-supply = <&vreg_l8g>; |
| vdda-pll-supply = <&vreg_l3g>; |
| |
| status = "okay"; |
| }; |
| |
| &usb_0 { |
| status = "okay"; |
| }; |
| |
| &usb_0_dwc3 { |
| /* TODO: Define USB-C connector properly */ |
| dr_mode = "peripheral"; |
| }; |
| |
| &usb_0_hsphy { |
| vdda-pll-supply = <&vreg_l5a>; |
| vdda18-supply = <&vreg_l7a>; |
| vdda33-supply = <&vreg_l13a>; |
| |
| status = "okay"; |
| }; |
| |
| &usb_0_qmpphy { |
| vdda-phy-supply = <&vreg_l3a>; |
| vdda-pll-supply = <&vreg_l5a>; |
| |
| status = "okay"; |
| }; |
| |
| &usb_1 { |
| status = "okay"; |
| }; |
| |
| &usb_1_dwc3 { |
| /* TODO: Define USB-C connector properly */ |
| dr_mode = "host"; |
| }; |
| |
| &usb_1_hsphy { |
| vdda-pll-supply = <&vreg_l1c>; |
| vdda18-supply = <&vreg_l7c>; |
| vdda33-supply = <&vreg_l2c>; |
| |
| status = "okay"; |
| }; |
| |
| &usb_1_qmpphy { |
| vdda-phy-supply = <&vreg_l4c>; |
| vdda-pll-supply = <&vreg_l1c>; |
| |
| status = "okay"; |
| }; |
| |
| &usb_2_hsphy0 { |
| vdda-pll-supply = <&vreg_l5a>; |
| vdda18-supply = <&vreg_l7g>; |
| vdda33-supply = <&vreg_l13a>; |
| |
| status = "okay"; |
| }; |
| |
| &usb_2_hsphy1 { |
| vdda-pll-supply = <&vreg_l5a>; |
| vdda18-supply = <&vreg_l7g>; |
| vdda33-supply = <&vreg_l13a>; |
| |
| status = "okay"; |
| }; |
| |
| &usb_2_hsphy2 { |
| vdda-pll-supply = <&vreg_l5a>; |
| vdda18-supply = <&vreg_l7g>; |
| vdda33-supply = <&vreg_l13a>; |
| |
| status = "okay"; |
| }; |
| |
| &usb_2_hsphy3 { |
| vdda-pll-supply = <&vreg_l5a>; |
| vdda18-supply = <&vreg_l7g>; |
| vdda33-supply = <&vreg_l13a>; |
| |
| status = "okay"; |
| }; |
| |
| &usb_2_qmpphy0 { |
| vdda-phy-supply = <&vreg_l3a>; |
| vdda-pll-supply = <&vreg_l5a>; |
| |
| status = "okay"; |
| }; |
| |
| &usb_2_qmpphy1 { |
| vdda-phy-supply = <&vreg_l3a>; |
| vdda-pll-supply = <&vreg_l5a>; |
| |
| status = "okay"; |
| }; |
| |
| &xo_board_clk { |
| clock-frequency = <38400000>; |
| }; |
| |
| /* PINCTRL */ |
| |
| &tlmm { |
| pcie2a_default: pcie2a-default-state { |
| clkreq-n-pins { |
| pins = "gpio142"; |
| function = "pcie2a_clkreq"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| |
| perst-n-pins { |
| pins = "gpio143"; |
| function = "gpio"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| |
| wake-n-pins { |
| pins = "gpio145"; |
| function = "gpio"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| pcie3a_default: pcie3a-default-state { |
| clkreq-n-pins { |
| pins = "gpio150"; |
| function = "pcie3a_clkreq"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| |
| perst-n-pins { |
| pins = "gpio151"; |
| function = "gpio"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| |
| wake-n-pins { |
| pins = "gpio56"; |
| function = "gpio"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| pcie3b_default: pcie3b-default-state { |
| clkreq-n-pins { |
| pins = "gpio152"; |
| function = "pcie3b_clkreq"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| |
| perst-n-pins { |
| pins = "gpio153"; |
| function = "gpio"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| |
| wake-n-pins { |
| pins = "gpio130"; |
| function = "gpio"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| pcie4_default: pcie4-default-state { |
| clkreq-n-pins { |
| pins = "gpio140"; |
| function = "pcie4_clkreq"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| |
| perst-n-pins { |
| pins = "gpio141"; |
| function = "gpio"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| |
| wake-n-pins { |
| pins = "gpio139"; |
| function = "gpio"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
