commit | 028d1aee1f0768f96a40871e2e33727a10ff146f | [log] [tgz] |
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author | Palmer Dabbelt <palmer@rivosinc.com> | Tue Mar 19 18:30:58 2024 -0700 |
committer | Palmer Dabbelt <palmer@rivosinc.com> | Wed Mar 20 08:56:09 2024 -0700 |
tree | 3e2780eba9c11b3cadcba97c58918fcaddf19e17 | |
parent | 01261e24cfab69c65043e1e61168348ae23a64c2 [diff] | |
parent | 282b9df4e9603bbb5c9cbf3ea60bc393287e8a2f [diff] |
Merge patch series "RISC-V: ACPI: Enable CPPC based cpufreq support" Sunil V L <sunilvl@ventanamicro.com> says: This series enables the support for "Collaborative Processor Performance Control (CPPC) on ACPI based RISC-V platforms. It depends on the encoding of CPPC registers as defined in RISC-V FFH spec [2]. CPPC is described in the ACPI spec [1]. RISC-V FFH spec required to enable this, is available at [2]. [1] - https://uefi.org/specs/ACPI/6.5/08_Processor_Configuration_and_Control.html#collaborative-processor-performance-control [2] - https://github.com/riscv-non-isa/riscv-acpi-ffh/releases/download/v1.0.0/riscv-ffh.pdf * b4-shazam-merge: RISC-V: defconfig: Enable CONFIG_ACPI_CPPC_CPUFREQ cpufreq: Move CPPC configs to common Kconfig and add RISC-V ACPI: RISC-V: Add CPPC driver Link: https://lore.kernel.org/r/20240208034414.22579-1-sunilvl@ventanamicro.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>