| // SPDX-License-Identifier: GPL-2.0 |
| // linux/arch/arm/mach-s3c2440/mach-smdk2440.c |
| // |
| // Copyright (c) 2004-2005 Simtec Electronics |
| // Ben Dooks <ben@simtec.co.uk> |
| // |
| // http://www.fluff.org/ben/smdk2440/ |
| // |
| // Thanks to Dimity Andric and TomTom for the loan of an SMDK2440. |
| |
| #include <linux/kernel.h> |
| #include <linux/types.h> |
| #include <linux/interrupt.h> |
| #include <linux/list.h> |
| #include <linux/timer.h> |
| #include <linux/init.h> |
| #include <linux/serial_core.h> |
| #include <linux/serial_s3c.h> |
| #include <linux/platform_device.h> |
| #include <linux/io.h> |
| |
| #include <asm/mach/arch.h> |
| #include <asm/mach/map.h> |
| #include <asm/mach/irq.h> |
| |
| #include <asm/irq.h> |
| #include <asm/mach-types.h> |
| |
| #include "regs-gpio.h" |
| #include "gpio-samsung.h" |
| #include "gpio-cfg.h" |
| |
| #include <linux/platform_data/fb-s3c2410.h> |
| #include <linux/platform_data/i2c-s3c2410.h> |
| |
| #include "devs.h" |
| #include "cpu.h" |
| |
| #include "s3c24xx.h" |
| #include "common-smdk-s3c24xx.h" |
| |
| static struct map_desc smdk2440_iodesc[] __initdata = { |
| /* ISA IO Space map (memory space selected by A24) */ |
| |
| { |
| .virtual = (u32)S3C24XX_VA_ISA_BYTE, |
| .pfn = __phys_to_pfn(S3C2410_CS2), |
| .length = 0x10000, |
| .type = MT_DEVICE, |
| }, { |
| .virtual = (u32)S3C24XX_VA_ISA_BYTE + 0x10000, |
| .pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)), |
| .length = SZ_4M, |
| .type = MT_DEVICE, |
| } |
| }; |
| |
| #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK |
| #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB |
| #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE |
| |
| static struct s3c2410_uartcfg smdk2440_uartcfgs[] __initdata = { |
| [0] = { |
| .hwport = 0, |
| .flags = 0, |
| .ucon = 0x3c5, |
| .ulcon = 0x03, |
| .ufcon = 0x51, |
| }, |
| [1] = { |
| .hwport = 1, |
| .flags = 0, |
| .ucon = 0x3c5, |
| .ulcon = 0x03, |
| .ufcon = 0x51, |
| }, |
| /* IR port */ |
| [2] = { |
| .hwport = 2, |
| .flags = 0, |
| .ucon = 0x3c5, |
| .ulcon = 0x43, |
| .ufcon = 0x51, |
| } |
| }; |
| |
| /* LCD driver info */ |
| |
| static struct s3c2410fb_display smdk2440_lcd_cfg __initdata = { |
| |
| .lcdcon5 = S3C2410_LCDCON5_FRM565 | |
| S3C2410_LCDCON5_INVVLINE | |
| S3C2410_LCDCON5_INVVFRAME | |
| S3C2410_LCDCON5_PWREN | |
| S3C2410_LCDCON5_HWSWP, |
| |
| .type = S3C2410_LCDCON1_TFT, |
| |
| .width = 240, |
| .height = 320, |
| |
| .pixclock = 166667, /* HCLK 60 MHz, divisor 10 */ |
| .xres = 240, |
| .yres = 320, |
| .bpp = 16, |
| .left_margin = 20, |
| .right_margin = 8, |
| .hsync_len = 4, |
| .upper_margin = 8, |
| .lower_margin = 7, |
| .vsync_len = 4, |
| }; |
| |
| static struct s3c2410fb_mach_info smdk2440_fb_info __initdata = { |
| .displays = &smdk2440_lcd_cfg, |
| .num_displays = 1, |
| .default_display = 0, |
| |
| #if 0 |
| /* currently setup by downloader */ |
| .gpccon = 0xaa940659, |
| .gpccon_mask = 0xffffffff, |
| .gpcup = 0x0000ffff, |
| .gpcup_mask = 0xffffffff, |
| .gpdcon = 0xaa84aaa0, |
| .gpdcon_mask = 0xffffffff, |
| .gpdup = 0x0000faff, |
| .gpdup_mask = 0xffffffff, |
| |
| .gpccon_reg = S3C2410_GPCCON, |
| .gpcup_reg = S3C2410_GPCUP, |
| .gpdcon_reg = S3C2410_GPDCON, |
| .gpdup_reg = S3C2410_GPDUP, |
| #endif |
| |
| .lpcsel = ((0xCE6) & ~7) | 1<<4, |
| }; |
| |
| static struct platform_device *smdk2440_devices[] __initdata = { |
| &s3c_device_ohci, |
| &s3c_device_lcd, |
| &s3c_device_wdt, |
| &s3c_device_i2c0, |
| &s3c_device_iis, |
| }; |
| |
| static void __init smdk2440_map_io(void) |
| { |
| s3c24xx_init_io(smdk2440_iodesc, ARRAY_SIZE(smdk2440_iodesc)); |
| s3c24xx_init_uarts(smdk2440_uartcfgs, ARRAY_SIZE(smdk2440_uartcfgs)); |
| s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); |
| } |
| |
| static void __init smdk2440_init_time(void) |
| { |
| s3c2440_init_clocks(16934400); |
| s3c24xx_timer_init(); |
| } |
| |
| static void __init smdk2440_machine_init(void) |
| { |
| s3c24xx_fb_set_platdata(&smdk2440_fb_info); |
| s3c_i2c0_set_platdata(NULL); |
| /* Configure the I2S pins (GPE0...GPE4) in correct mode */ |
| s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), |
| S3C_GPIO_PULL_NONE); |
| platform_add_devices(smdk2440_devices, ARRAY_SIZE(smdk2440_devices)); |
| smdk_machine_init(); |
| } |
| |
| MACHINE_START(S3C2440, "SMDK2440") |
| /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ |
| .atag_offset = 0x100, |
| .nr_irqs = NR_IRQS_S3C2440, |
| |
| .init_irq = s3c2440_init_irq, |
| .map_io = smdk2440_map_io, |
| .init_machine = smdk2440_machine_init, |
| .init_time = smdk2440_init_time, |
| MACHINE_END |