| // SPDX-License-Identifier: BSD-3-Clause |
| /* |
| * Copyright (c) 2021, The Linux Foundation. All rights reserved. |
| * Copyright (c) 2022, Linaro Limited |
| */ |
| |
| /dts-v1/; |
| |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/regulator/qcom,rpmh-regulator.h> |
| |
| #include "sa8540p.dtsi" |
| #include "sa8540p-pmics.dtsi" |
| |
| / { |
| model = "Qualcomm SA8540P Ride"; |
| compatible = "qcom,sa8540p-ride", "qcom,sa8540p"; |
| |
| aliases { |
| i2c0 = &i2c0; |
| i2c1 = &i2c1; |
| i2c12 = &i2c12; |
| i2c15 = &i2c15; |
| i2c18 = &i2c18; |
| serial0 = &uart17; |
| }; |
| |
| chosen { |
| stdout-path = "serial0:115200n8"; |
| }; |
| }; |
| |
| &apps_rsc { |
| regulators-0 { |
| compatible = "qcom,pm8150-rpmh-regulators"; |
| qcom,pmic-id = "a"; |
| |
| vreg_l3a: ldo3 { |
| regulator-name = "vreg_l3a"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1208000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l5a: ldo5 { |
| regulator-name = "vreg_l5a"; |
| regulator-min-microvolt = <912000>; |
| regulator-max-microvolt = <912000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l7a: ldo7 { |
| regulator-name = "vreg_l7a"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l11a: ldo11 { |
| regulator-name = "vreg_l11a"; |
| regulator-min-microvolt = <880000>; |
| regulator-max-microvolt = <880000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l13a: ldo13 { |
| regulator-name = "vreg_l13a"; |
| regulator-min-microvolt = <3072000>; |
| regulator-max-microvolt = <3072000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| }; |
| |
| regulators-1 { |
| compatible = "qcom,pm8150-rpmh-regulators"; |
| qcom,pmic-id = "c"; |
| |
| vreg_l1c: ldo1 { |
| regulator-name = "vreg_l1c"; |
| regulator-min-microvolt = <912000>; |
| regulator-max-microvolt = <912000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l2c: ldo2 { |
| regulator-name = "vreg_l2c"; |
| regulator-min-microvolt = <3072000>; |
| regulator-max-microvolt = <3072000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l4c: ldo4 { |
| regulator-name = "vreg_l4c"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1208000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l6c: ldo6 { |
| regulator-name = "vreg_l6c"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM |
| RPMH_REGULATOR_MODE_HPM>; |
| regulator-allow-set-load; |
| }; |
| |
| vreg_l7c: ldo7 { |
| regulator-name = "vreg_l7c"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l17c: ldo17 { |
| regulator-name = "vreg_l17c"; |
| regulator-min-microvolt = <2504000>; |
| regulator-max-microvolt = <2504000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM |
| RPMH_REGULATOR_MODE_HPM>; |
| regulator-allow-set-load; |
| }; |
| }; |
| |
| regulators-2 { |
| compatible = "qcom,pm8150-rpmh-regulators"; |
| qcom,pmic-id = "g"; |
| |
| vreg_l3g: ldo3 { |
| regulator-name = "vreg_l3g"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l7g: ldo7 { |
| regulator-name = "vreg_l7g"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| |
| vreg_l8g: ldo8 { |
| regulator-name = "vreg_l8g"; |
| regulator-min-microvolt = <880000>; |
| regulator-max-microvolt = <880000>; |
| regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; |
| }; |
| }; |
| }; |
| |
| ðernet0 { |
| snps,mtl-rx-config = <ðernet0_mtl_rx_setup>; |
| snps,mtl-tx-config = <ðernet0_mtl_tx_setup>; |
| |
| max-speed = <1000>; |
| phy-handle = <&rgmii_phy>; |
| phy-mode = "rgmii-txid"; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <ðernet0_default>; |
| |
| status = "okay"; |
| |
| mdio { |
| compatible = "snps,dwmac-mdio"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| /* Marvell 88EA1512 */ |
| rgmii_phy: phy@8 { |
| compatible = "ethernet-phy-id0141.0dd4"; |
| reg = <0x8>; |
| |
| interrupts-extended = <&tlmm 127 IRQ_TYPE_EDGE_FALLING>; |
| |
| reset-gpios = <&pmm8540c_gpios 1 GPIO_ACTIVE_LOW>; |
| reset-assert-us = <11000>; |
| reset-deassert-us = <70000>; |
| |
| device_type = "ethernet-phy"; |
| |
| /* Set to RGMII_SGMII mode and soft reset. Turn off auto-negotiation |
| * from userspace to talk to the switch on the SGMII side of things |
| */ |
| marvell,reg-init = |
| /* Set MODE[2:0] to RGMII_SGMII */ |
| <0x12 0x14 0xfff8 0x4>, |
| /* Soft reset required after changing MODE[2:0] */ |
| <0x12 0x14 0x7fff 0x8000>; |
| }; |
| }; |
| |
| ethernet0_mtl_rx_setup: rx-queues-config { |
| snps,rx-queues-to-use = <1>; |
| snps,rx-sched-sp; |
| |
| queue0 { |
| snps,dcb-algorithm; |
| snps,map-to-dma-channel = <0x0>; |
| snps,route-up; |
| snps,priority = <0x1>; |
| }; |
| |
| queue1 { |
| snps,dcb-algorithm; |
| snps,map-to-dma-channel = <0x1>; |
| snps,route-ptp; |
| }; |
| |
| queue2 { |
| snps,avb-algorithm; |
| snps,map-to-dma-channel = <0x2>; |
| snps,route-avcp; |
| }; |
| |
| queue3 { |
| snps,avb-algorithm; |
| snps,map-to-dma-channel = <0x3>; |
| snps,priority = <0xc>; |
| }; |
| }; |
| |
| ethernet0_mtl_tx_setup: tx-queues-config { |
| snps,tx-queues-to-use = <1>; |
| snps,tx-sched-sp; |
| |
| queue0 { |
| snps,dcb-algorithm; |
| }; |
| |
| queue1 { |
| snps,dcb-algorithm; |
| }; |
| |
| queue2 { |
| snps,avb-algorithm; |
| snps,send_slope = <0x1000>; |
| snps,idle_slope = <0x1000>; |
| snps,high_credit = <0x3e800>; |
| snps,low_credit = <0xffc18000>; |
| }; |
| |
| queue3 { |
| snps,avb-algorithm; |
| snps,send_slope = <0x1000>; |
| snps,idle_slope = <0x1000>; |
| snps,high_credit = <0x3e800>; |
| snps,low_credit = <0xffc18000>; |
| }; |
| }; |
| }; |
| |
| ðernet1 { |
| snps,mtl-rx-config = <ðernet1_mtl_rx_setup>; |
| snps,mtl-tx-config = <ðernet1_mtl_tx_setup>; |
| |
| max-speed = <1000>; |
| phy-mode = "rgmii-txid"; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <ðernet1_default>; |
| |
| status = "okay"; |
| |
| fixed-link { |
| speed = <1000>; |
| full-duplex; |
| }; |
| |
| ethernet1_mtl_rx_setup: rx-queues-config { |
| snps,rx-queues-to-use = <1>; |
| snps,rx-sched-sp; |
| |
| queue0 { |
| snps,dcb-algorithm; |
| snps,map-to-dma-channel = <0x0>; |
| snps,route-up; |
| snps,priority = <0x1>; |
| }; |
| |
| queue1 { |
| snps,dcb-algorithm; |
| snps,map-to-dma-channel = <0x1>; |
| snps,route-ptp; |
| }; |
| |
| queue2 { |
| snps,avb-algorithm; |
| snps,map-to-dma-channel = <0x2>; |
| snps,route-avcp; |
| }; |
| |
| queue3 { |
| snps,avb-algorithm; |
| snps,map-to-dma-channel = <0x3>; |
| snps,priority = <0xc>; |
| }; |
| }; |
| |
| ethernet1_mtl_tx_setup: tx-queues-config { |
| snps,tx-queues-to-use = <1>; |
| snps,tx-sched-sp; |
| |
| queue0 { |
| snps,dcb-algorithm; |
| }; |
| |
| queue1 { |
| snps,dcb-algorithm; |
| }; |
| |
| queue2 { |
| snps,avb-algorithm; |
| snps,send_slope = <0x1000>; |
| snps,idle_slope = <0x1000>; |
| snps,high_credit = <0x3e800>; |
| snps,low_credit = <0xffc18000>; |
| }; |
| |
| queue3 { |
| snps,avb-algorithm; |
| snps,send_slope = <0x1000>; |
| snps,idle_slope = <0x1000>; |
| snps,high_credit = <0x3e800>; |
| snps,low_credit = <0xffc18000>; |
| }; |
| }; |
| }; |
| |
| &i2c0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c0_default>; |
| |
| status = "okay"; |
| }; |
| |
| &i2c1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c1_default>; |
| |
| status = "okay"; |
| }; |
| |
| &i2c12 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c12_default>; |
| |
| status = "okay"; |
| }; |
| |
| &i2c15 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c15_default>; |
| |
| status = "okay"; |
| }; |
| |
| &i2c18 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c18_default>; |
| |
| status = "okay"; |
| }; |
| |
| &pcie2a { |
| ranges = <0x01000000 0x0 0x3c200000 0x0 0x3c200000 0x0 0x100000>, |
| <0x02000000 0x0 0x3c300000 0x0 0x3c300000 0x0 0x1d00000>, |
| <0x03000000 0x5 0x00000000 0x5 0x00000000 0x1 0x00000000>; |
| |
| perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>; |
| wake-gpios = <&tlmm 145 GPIO_ACTIVE_HIGH>; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pcie2a_default>; |
| |
| status = "okay"; |
| }; |
| |
| &pcie2a_phy { |
| vdda-phy-supply = <&vreg_l11a>; |
| vdda-pll-supply = <&vreg_l3a>; |
| |
| status = "okay"; |
| }; |
| |
| &pcie3a { |
| ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>, |
| <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x20000000>, |
| <0x03000000 0x6 0x00000000 0x6 0x00000000 0x2 0x00000000>; |
| |
| perst-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>; |
| wake-gpios = <&tlmm 56 GPIO_ACTIVE_HIGH>; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pcie3a_default>; |
| |
| status = "okay"; |
| }; |
| |
| &pcie3a_phy { |
| vdda-phy-supply = <&vreg_l11a>; |
| vdda-pll-supply = <&vreg_l3a>; |
| |
| status = "okay"; |
| }; |
| |
| &pmm8540a_rtc { |
| nvmem-cells = <&rtc_offset>; |
| nvmem-cell-names = "offset"; |
| |
| status = "okay"; |
| }; |
| |
| &pmm8540c_sdam_2 { |
| status = "okay"; |
| |
| rtc_offset: rtc-offset@a0 { |
| reg = <0xa0 0x4>; |
| }; |
| }; |
| |
| &qup0 { |
| status = "okay"; |
| }; |
| |
| &qup1 { |
| status = "okay"; |
| }; |
| |
| &qup2 { |
| status = "okay"; |
| }; |
| |
| &remoteproc_nsp0 { |
| firmware-name = "qcom/sa8540p/cdsp0.mbn"; |
| status = "okay"; |
| }; |
| |
| &remoteproc_nsp1 { |
| firmware-name = "qcom/sa8540p/cdsp1.mbn"; |
| status = "okay"; |
| }; |
| |
| &uart17 { |
| compatible = "qcom,geni-debug-uart"; |
| status = "okay"; |
| }; |
| |
| &ufs_mem_hc { |
| reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>; |
| |
| vcc-supply = <&vreg_l17c>; |
| vccq-supply = <&vreg_l6c>; |
| |
| status = "okay"; |
| }; |
| |
| &ufs_mem_phy { |
| vdda-phy-supply = <&vreg_l8g>; |
| vdda-pll-supply = <&vreg_l3g>; |
| |
| status = "okay"; |
| }; |
| |
| &usb_0 { |
| status = "okay"; |
| }; |
| |
| &usb_0_dwc3 { |
| dr_mode = "peripheral"; |
| }; |
| |
| &usb_0_hsphy { |
| vdda-pll-supply = <&vreg_l5a>; |
| vdda18-supply = <&vreg_l7a>; |
| vdda33-supply = <&vreg_l13a>; |
| |
| status = "okay"; |
| }; |
| |
| &usb_0_qmpphy { |
| vdda-phy-supply = <&vreg_l3a>; |
| vdda-pll-supply = <&vreg_l5a>; |
| |
| status = "okay"; |
| }; |
| |
| &usb_2_hsphy0 { |
| vdda-pll-supply = <&vreg_l5a>; |
| vdda18-supply = <&vreg_l7g>; |
| vdda33-supply = <&vreg_l13a>; |
| |
| status = "okay"; |
| }; |
| |
| &usb_2_qmpphy0 { |
| vdda-phy-supply = <&vreg_l3a>; |
| vdda-pll-supply = <&vreg_l5a>; |
| |
| status = "okay"; |
| }; |
| |
| &xo_board_clk { |
| clock-frequency = <38400000>; |
| }; |
| |
| /* PINCTRL */ |
| |
| &tlmm { |
| ethernet0_default: ethernet0-default-state { |
| mdc-pins { |
| pins = "gpio175"; |
| function = "rgmii_0"; |
| drive-strength = <16>; |
| bias-pull-up; |
| }; |
| |
| mdio-pins { |
| pins = "gpio176"; |
| function = "rgmii_0"; |
| drive-strength = <16>; |
| bias-pull-up; |
| }; |
| |
| rgmii-tx-pins { |
| pins = "gpio183", "gpio184", "gpio185", "gpio186", "gpio187", "gpio188"; |
| function = "rgmii_0"; |
| drive-strength = <16>; |
| bias-pull-up; |
| }; |
| |
| rgmii-rx-pins { |
| pins = "gpio177", "gpio178", "gpio179", "gpio180", "gpio181", "gpio182"; |
| function = "rgmii_0"; |
| drive-strength = <16>; |
| bias-disable; |
| }; |
| }; |
| |
| ethernet1_default: ethernet1-default-state { |
| mdc-pins { |
| pins = "gpio97"; |
| function = "rgmii_1"; |
| drive-strength = <16>; |
| bias-pull-up; |
| }; |
| |
| mdio-pins { |
| pins = "gpio98"; |
| function = "rgmii_1"; |
| drive-strength = <16>; |
| bias-pull-up; |
| }; |
| |
| rgmii-tx-pins { |
| pins = "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110"; |
| function = "rgmii_1"; |
| drive-strength = <16>; |
| bias-pull-up; |
| }; |
| |
| rgmii-rx-pins { |
| pins = "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104"; |
| function = "rgmii_1"; |
| drive-strength = <16>; |
| bias-disable; |
| }; |
| }; |
| |
| i2c0_default: i2c0-default-state { |
| /* To USB7002T-I/KDXVA0 USB hub (SIP1 only) */ |
| pins = "gpio135", "gpio136"; |
| function = "qup0"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| |
| i2c1_default: i2c1-default-state { |
| /* To PM40028B-F3EI PCIe switch */ |
| pins = "gpio158", "gpio159"; |
| function = "qup1"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| |
| i2c12_default: i2c12-default-state { |
| /* To Maxim max20411 */ |
| pins = "gpio0", "gpio1"; |
| function = "qup12"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| |
| i2c15_default: i2c15-default-state { |
| /* To display connector (SIP1 only) */ |
| pins = "gpio36", "gpio37"; |
| function = "qup15"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| |
| i2c18_default: i2c18-default-state { |
| /* To ASM330LHH IMU (SIP1 only) */ |
| pins = "gpio66", "gpio67"; |
| function = "qup18"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| |
| pcie2a_default: pcie2a-default-state { |
| perst-pins { |
| pins = "gpio143"; |
| function = "gpio"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| |
| clkreq-pins { |
| pins = "gpio142"; |
| function = "pcie2a_clkreq"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| |
| wake-pins { |
| pins = "gpio145"; |
| function = "gpio"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| pcie3a_default: pcie3a-default-state { |
| perst-pins { |
| pins = "gpio151"; |
| function = "gpio"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| |
| clkreq-pins { |
| pins = "gpio150"; |
| function = "pcie3a_clkreq"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| |
| wake-pins { |
| pins = "gpio56"; |
| function = "gpio"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
