| Freescale i.MX TPM PWM controller |
| |
| Required properties: |
| - compatible : Should be "fsl,imx7ulp-pwm". |
| - reg: Physical base address and length of the controller's registers. |
| - #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of the cells format. |
| - clocks : The clock provided by the SoC to drive the PWM. |
| - interrupts: The interrupt for the PWM controller. |
| |
| Note: The TPM counter and period counter are shared between multiple channels, so all channels |
| should use same period setting. |
| |
| Example: |
| |
| tpm4: pwm@40250000 { |
| compatible = "fsl,imx7ulp-pwm"; |
| reg = <0x40250000 0x1000>; |
| assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>; |
| assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>; |
| clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>; |
| #pwm-cells = <3>; |
| }; |
