| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-hcu.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Intel Keem Bay OCS HCU Device Tree Bindings |
| |
| maintainers: |
| - Declan Murphy <declan.murphy@intel.com> |
| - Daniele Alessandrelli <daniele.alessandrelli@intel.com> |
| |
| description: |
| The Intel Keem Bay Offload and Crypto Subsystem (OCS) Hash Control Unit (HCU) |
| provides hardware-accelerated hashing and HMAC. |
| |
| properties: |
| compatible: |
| const: intel,keembay-ocs-hcu |
| |
| reg: |
| maxItems: 1 |
| |
| interrupts: |
| maxItems: 1 |
| |
| clocks: |
| maxItems: 1 |
| |
| required: |
| - compatible |
| - reg |
| - interrupts |
| - clocks |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| crypto@3000b000 { |
| compatible = "intel,keembay-ocs-hcu"; |
| reg = <0x3000b000 0x1000>; |
| interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&scmi_clk 94>; |
| }; |
