| /* SPDX-License-Identifier: GPL-2.0 |
| * |
| * Copyright 2016-2018 HabanaLabs, Ltd. |
| * All Rights Reserved. |
| * |
| */ |
| |
| /************************************ |
| ** This is an auto-generated file ** |
| ** DO NOT EDIT BELOW ** |
| ************************************/ |
| |
| #ifndef ASIC_REG_SRAM_Y0_X1_RTR_REGS_H_ |
| #define ASIC_REG_SRAM_Y0_X1_RTR_REGS_H_ |
| |
| /* |
| ***************************************** |
| * SRAM_Y0_X1_RTR (Prototype: IC_RTR) |
| ***************************************** |
| */ |
| |
| #define mmSRAM_Y0_X1_RTR_HBW_RD_RQ_E_ARB 0x205100 |
| |
| #define mmSRAM_Y0_X1_RTR_HBW_RD_RQ_W_ARB 0x205104 |
| |
| #define mmSRAM_Y0_X1_RTR_HBW_RD_RQ_L_ARB 0x205110 |
| |
| #define mmSRAM_Y0_X1_RTR_HBW_E_ARB_MAX 0x205120 |
| |
| #define mmSRAM_Y0_X1_RTR_HBW_W_ARB_MAX 0x205124 |
| |
| #define mmSRAM_Y0_X1_RTR_HBW_L_ARB_MAX 0x205130 |
| |
| #define mmSRAM_Y0_X1_RTR_HBW_DATA_E_ARB 0x205140 |
| |
| #define mmSRAM_Y0_X1_RTR_HBW_DATA_W_ARB 0x205144 |
| |
| #define mmSRAM_Y0_X1_RTR_HBW_DATA_L_ARB 0x205148 |
| |
| #define mmSRAM_Y0_X1_RTR_HBW_WR_RS_E_ARB 0x205160 |
| |
| #define mmSRAM_Y0_X1_RTR_HBW_WR_RS_W_ARB 0x205164 |
| |
| #define mmSRAM_Y0_X1_RTR_HBW_WR_RS_L_ARB 0x205168 |
| |
| #define mmSRAM_Y0_X1_RTR_LBW_RD_RQ_E_ARB 0x205200 |
| |
| #define mmSRAM_Y0_X1_RTR_LBW_RD_RQ_W_ARB 0x205204 |
| |
| #define mmSRAM_Y0_X1_RTR_LBW_RD_RQ_L_ARB 0x205210 |
| |
| #define mmSRAM_Y0_X1_RTR_LBW_E_ARB_MAX 0x205220 |
| |
| #define mmSRAM_Y0_X1_RTR_LBW_W_ARB_MAX 0x205224 |
| |
| #define mmSRAM_Y0_X1_RTR_LBW_L_ARB_MAX 0x205230 |
| |
| #define mmSRAM_Y0_X1_RTR_LBW_DATA_E_ARB 0x205240 |
| |
| #define mmSRAM_Y0_X1_RTR_LBW_DATA_W_ARB 0x205244 |
| |
| #define mmSRAM_Y0_X1_RTR_LBW_DATA_L_ARB 0x205248 |
| |
| #define mmSRAM_Y0_X1_RTR_LBW_WR_RS_E_ARB 0x205260 |
| |
| #define mmSRAM_Y0_X1_RTR_LBW_WR_RS_W_ARB 0x205264 |
| |
| #define mmSRAM_Y0_X1_RTR_LBW_WR_RS_L_ARB 0x205268 |
| |
| #define mmSRAM_Y0_X1_RTR_DBG_E_ARB 0x205300 |
| |
| #define mmSRAM_Y0_X1_RTR_DBG_W_ARB 0x205304 |
| |
| #define mmSRAM_Y0_X1_RTR_DBG_L_ARB 0x205310 |
| |
| #define mmSRAM_Y0_X1_RTR_DBG_E_ARB_MAX 0x205320 |
| |
| #define mmSRAM_Y0_X1_RTR_DBG_W_ARB_MAX 0x205324 |
| |
| #define mmSRAM_Y0_X1_RTR_DBG_L_ARB_MAX 0x205330 |
| |
| #endif /* ASIC_REG_SRAM_Y0_X1_RTR_REGS_H_ */ |